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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , =?utf-8?q?Roger_Pau_Mon?= =?utf-8?q?n=C3=A9?= , Wei Liu , Anthony PERARD , Andrew Cooper , George Dunlap , "Jan Beulich" , Julien Grall , "Stefano Stabellini" Subject: [PATCH v9 0/2] vPCI capabilities filtering Date: Fri, 1 Dec 2023 10:45:48 -0500 Message-ID: <20231201154552.3066321-1-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD5:EE_|BL1PR12MB5189:EE_ X-MS-Office365-Filtering-Correlation-Id: 403d8fc0-6203-49cc-f24f-08dbf2849e4a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0EvF+wk3HrCQ8xww+7otVP8D6EdJFMKWxk2urgVnBigVPp7ZWycHWfOY1xxOMcJ/diLdBl31amX/8ESlxxOvnVH2lgd8D/3e2z0oXXb3Lgjv5Ow5UOCR/dgrdd6Ew+2l9lEeQhKQPWTMZhICkCtRSMlT1gB1kYADS0ndzNczlxCNU4751YdIrNRLWcNQMGYiD45v0cdDl6jA/t97ZLLA1c1sIKJRIwb+CMMZsh6py8+CR3Sto4IFEt29pyBmwMhOvsueTNUXv2cjvkuaXL604jED70GgkefnMaRpEEQCmHxN8/m5WZ/7DueuscrZioQou1u2bEk+iNk19BWrcKmHrKpOU6MqnNqSOpoEdJuVMblKZSApXV/bU8aEt9Tjn+GdTkQGw5u/yC0LVuOrU2hT2WmqYrW+wdiB3SyysEuKo4ntMPu9DWxleecCsq8MQCPRmERFL4PFuyeY0moSQdKA11ok/7rg+wnlGKD52OhyVOctWJToVT/8VR7IpL9D3dYEGZI9j52pSZHwjIHpqDUIRs64ray0AGogYvC0lnv9RL9QhUeZI9Nm9nvUxCBpFQX9CYPASBLatixuNHK6pluBuRyCWzT4q7yE3DPZTo6GU4IuewmXetBb7877WGm5w7TuHeLaqVruE0FaQdqKFe24SJ+P/v4Z/s/yOpkm2vKQ4XG85HvTtplEqddNI/caRpM/yigqaAmDkbOfvx87IS+MBe1SbeQS7A8nHiKNT5S/aEgDXcolxeHVwFY9rrn4vKxT0dprHIyqExtelUiz+YmYuw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(396003)(376002)(346002)(39860400002)(230922051799003)(1800799012)(451199024)(64100799003)(82310400011)(186009)(36840700001)(40470700004)(46966006)(40460700003)(66899024)(336012)(426003)(83380400001)(82740400003)(86362001)(36756003)(81166007)(356005)(47076005)(36860700001)(70586007)(70206006)(8936002)(8676002)(54906003)(4326008)(6916009)(316002)(40480700001)(1076003)(5660300002)(2906002)(44832011)(2616005)(478600001)(966005)(26005)(6666004)(41300700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2023 15:46:00.7280 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 403d8fc0-6203-49cc-f24f-08dbf2849e4a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD5.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5189 This small series enables vPCI to filter which PCI capabilities we expose to a domU. This series adds vPCI register handlers within xen/drivers/vpci/header.c:init_bars(), along with some supporting functions. Note there are minor rebase conflicts with the in-progress vPCI series [1]. These conflicts fall into the category of functions and code being added adjacent to one another, so are easily resolved. I did not identify any dependency on the vPCI locking work, and the two series deal with different aspects of emulating the PCI header. Future work may involve adding handlers for more registers in the vPCI header, such as VID/DID, etc. Future work may also involve exposing additional capabilities to the guest for broader device/driver support. v8->v9: * address feedback v7->v8: * address feedback v6->v7: * address feedback in ("xen/vpci: header: status register handler") * drop ("xen/pci: convert pci_find_*cap* to pci_sbdf_t") and ("x86/msi: rearrange read_pci_mem_bar slightly") as they were committed v5->v6: * drop ("xen/pci: update PCI_STATUS_* constants") as it has been committed v4->v5: * drop ("x86/msi: remove some unused-but-set-variables") as it has been committed * add ("xen/pci: update PCI_STATUS_* constants") * squash ro_mask patch v3->v4: * drop "xen/pci: address a violation of MISRA C:2012 Rule 8.3" as it has been committed * re-order status register handler and capabilities filtering patches * split an unrelated change from ("xen/pci: convert pci_find_*cap* to pci_sbdf_t") into its own patch * add new patch ("x86/msi: rearrange read_pci_mem_bar slightly") based on feedback * add new RFC patch ("xen/vpci: support ro mask") v2->v3: * drop RFC "xen/vpci: header: avoid cast for value passed to vpci_read_val" * minor misra C violation fixup in preparatory patch * switch to pci_sbdf_t in preparatory patch * introduce status handler v1->v2: * squash helper functions into the patch where they are used to avoid transient dead code situation * add new RFC patch, possibly throwaway, to get an idea of what it would look like to get rid of the (void *)(uintptr_t) cast by introducing a new memory allocation [1] https://lists.xenproject.org/archives/html/xen-devel/2023-08/msg02361.html Stewart Hildebrand (2): xen/vpci: header: status register handler xen/vpci: header: filter PCI capabilities tools/tests/vpci/main.c | 111 +++++++++++++++++++++++++++++++++++++ xen/drivers/pci/pci.c | 33 +++++++---- xen/drivers/vpci/header.c | 79 +++++++++++++++++++++++++- xen/drivers/vpci/vpci.c | 64 ++++++++++++++++----- xen/include/xen/pci.h | 3 + xen/include/xen/pci_regs.h | 9 +++ xen/include/xen/vpci.h | 30 ++++++++-- 7 files changed, 297 insertions(+), 32 deletions(-) base-commit: 1571ff7a987b88b20598a6d49910457f3b2c59f1