From patchwork Sat Mar 30 10:40:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pu Wen X-Patchwork-Id: 10878303 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 07F3814DE for ; Sat, 30 Mar 2019 10:51:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E365A28AA4 for ; Sat, 30 Mar 2019 10:51:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CFE4C28D9A; Sat, 30 Mar 2019 10:51:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 27F0F28AA4 for ; Sat, 30 Mar 2019 10:51:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hABYs-0006ae-1D; Sat, 30 Mar 2019 10:50:06 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hABYq-0006S2-Sg for xen-devel@lists.xenproject.org; Sat, 30 Mar 2019 10:50:04 +0000 X-Inumbo-ID: 90ede98c-52d9-11e9-bc90-bc764e045a96 Received: from spam2.hygon.cn (unknown [110.188.70.11]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 90ede98c-52d9-11e9-bc90-bc764e045a96; Sat, 30 Mar 2019 10:50:02 +0000 (UTC) Received: from MK-DB.hygon.cn ([172.23.18.60]) by spam2.hygon.cn with ESMTP id x2UAf1nK089107; Sat, 30 Mar 2019 18:41:02 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from cncheex01.Hygon.cn ([172.23.18.10]) by MK-DB.hygon.cn with ESMTP id x2UAenJb014768; Sat, 30 Mar 2019 18:40:49 +0800 (GMT-8) (envelope-from puwen@hygon.cn) Received: from pw-vbox.hygon.cn (172.23.18.44) by cncheex01.Hygon.cn (172.23.18.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1466.3; Sat, 30 Mar 2019 18:40:59 +0800 From: Pu Wen To: Date: Sat, 30 Mar 2019 18:40:28 +0800 Message-ID: X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [172.23.18.44] X-ClientProxiedBy: cncheex01.Hygon.cn (172.23.18.10) To cncheex01.Hygon.cn (172.23.18.10) X-MAIL: spam2.hygon.cn x2UAf1nK089107 X-DNSRBL: Subject: [Xen-devel] [PATCH v4 00/15] Add support for Hygon Dhyana Family 18h processor X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Wei Liu , Suravee Suthikulpanit , Pu Wen , Ian Jackson , Jan Beulich , Andrew Cooper , Boris Ostrovsky , Brian Woods , =?utf-8?q?Roger_Pau_Monn=C3=A9?= Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP As a new x86 CPU vendor, Chengdu Haiguang IC Design Co., Ltd (Hygon) is a joint venture between AMD and Haiguang Information Technology Co., Ltd., aims at providing high performance x86 processors for China server market. The first generation Hygon processor(Dhyana) originates from AMD technology and shares most of the architecture with AMD's family 17h, but with different CPU vendor ID("HygonGenuine") and family series number 18h (Hygon negotiated with AMD to make sure that only Hygon will use family 18h). To enable support of Xen to Hygon Dhyana CPU, add a new vendor type (X86_VENDOR_HYGON, with value of 5), and share most of the code with AMD family 17h. The MSRs and CPUIDs which are used by this patch series are all defined in this PPR[1]. This patch series have been applied and tested successfully on Hygon Dhyana processor, also been tested on AMD EPYC (family 17h) processor. It works fine and makes no harm to the existing code. Reference: [1] https://www.amd.com/system/files/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf v3->v4: - Revert opt_cpuid_mask_l7s0_(eax/ebx) to amd.c. - Create a separate patch to fix common cpuid faulting probing issue for AMD and Hygon. - Rename _vpmu_init() to common_init() and move the default case into it. - Coding style refine. v2->v3: - Rebased on 4.13-unstable and tested against it. - Simplify code of hygon.c by re-using early_init_amd(). - Return false in the function probe_cpuid_faulting(). - Adjust code for calculating phys_proc_id for Hygon. - Abstract common function _vpmu_init() and add hygon_vpmu_init(). - Refine some comments and descriptions. - Add Acked-by from Jan Beulich for x86/cpu/mtrr, x86/cpu/mce, x86/spec_ctrl, x86/apic, x86/acpi, x86/iommu, x86/pv, x86/domain, x86/domctl and x86/cpuid. v1->v2: - Rebased on 4.12.0-rc3 and tested against it. - Move opt_cpuid_mask_l7s0_(eax/ebx) to common.c. - Insert Hygon cases after AMD ones instead of above. - Remove (rd/wr)msr_hygon_safe and use (rd/wr)msr_safe instead. - Remove wrmsr_hygon and use wrmsrl instead. - Remove the unnecessary change to xstate. - Refine some codes and comments. - Add Acked-by from Jan Beulich for x86/traps. - Add Acked-by from Wei Liu for tools/libxc. Pu Wen (15): x86/cpu: Create Hygon Dhyana architecture support file x86/cpu: Fix common cpuid faulting probing for AMD and Hygon x86/cpu/mtrr: Add Hygon Dhyana support to get TOP_MEM2 x86/cpu/vpmu: Add Hygon Dhyana and AMD Zen support for vPMU x86/cpu/mce: Add Hygon Dhyana support to the MCA infrastructure x86/spec_ctrl: Add Hygon Dhyana to the respective mitigation machinery x86/apic: Add Hygon Dhyana support x86/acpi: Add Hygon Dhyana support x86/iommu: Add Hygon Dhyana support x86/pv: Add Hygon Dhyana support to emulate MSRs access x86/domain: Add Hygon Dhyana support x86/domctl: Add Hygon Dhyana support x86/traps: Add Hygon Dhyana support x86/cpuid: Add Hygon Dhyana support tools/libxc: Add Hygon Dhyana support tools/libxc/xc_cpuid_x86.c | 16 ++++-- xen/arch/x86/acpi/cpu_idle.c | 3 +- xen/arch/x86/acpi/cpufreq/cpufreq.c | 8 +-- xen/arch/x86/acpi/cpufreq/powernow.c | 3 +- xen/arch/x86/apic.c | 5 ++ xen/arch/x86/cpu/Makefile | 1 + xen/arch/x86/cpu/amd.c | 2 +- xen/arch/x86/cpu/common.c | 9 +++- xen/arch/x86/cpu/cpu.h | 3 ++ xen/arch/x86/cpu/hygon.c | 92 ++++++++++++++++++++++++++++++++++ xen/arch/x86/cpu/mcheck/amd_nonfatal.c | 5 +- xen/arch/x86/cpu/mcheck/mce.c | 6 ++- xen/arch/x86/cpu/mcheck/mce_amd.c | 5 +- xen/arch/x86/cpu/mcheck/non-fatal.c | 3 +- xen/arch/x86/cpu/mcheck/vmce.c | 2 + xen/arch/x86/cpu/mtrr/generic.c | 5 +- xen/arch/x86/cpu/vpmu.c | 5 ++ xen/arch/x86/cpu/vpmu_amd.c | 60 +++++++++++++++------- xen/arch/x86/cpuid.c | 10 ++-- xen/arch/x86/dom0_build.c | 3 +- xen/arch/x86/domain.c | 9 ++-- xen/arch/x86/domctl.c | 13 +++-- xen/arch/x86/pv/emul-priv-op.c | 19 ++++--- xen/arch/x86/spec_ctrl.c | 6 ++- xen/arch/x86/traps.c | 3 ++ xen/include/asm-x86/iommu.h | 1 + xen/include/asm-x86/vpmu.h | 1 + xen/include/asm-x86/x86-vendors.h | 3 +- 28 files changed, 244 insertions(+), 57 deletions(-) create mode 100644 xen/arch/x86/cpu/hygon.c