From patchwork Wed Jan 22 01:58:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bobby Eshleman X-Patchwork-Id: 11344987 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35B231398 for ; Wed, 22 Jan 2020 05:14:58 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 06E3D24656 for ; Wed, 22 Jan 2020 05:14:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lfkjWqX2" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 06E3D24656 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iu8L5-00055f-4d; Wed, 22 Jan 2020 05:14:03 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1iu5JR-000611-Mo for xen-devel@lists.xenproject.org; Wed, 22 Jan 2020 02:00:09 +0000 X-Inumbo-ID: ea52f09e-3cba-11ea-9fd7-bc764e2007e4 Received: from mail-yw1-xc43.google.com (unknown [2607:f8b0:4864:20::c43]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id ea52f09e-3cba-11ea-9fd7-bc764e2007e4; Wed, 22 Jan 2020 02:00:08 +0000 (UTC) Received: by mail-yw1-xc43.google.com with SMTP id n184so2500001ywc.3 for ; Tue, 21 Jan 2020 18:00:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ThQ6Ka763GcQAsux4+Z87JRHK09MzEDNA/Mqm9J+LM0=; b=lfkjWqX2BVNwKac1CLSiJKZU7+aFoyL2yUdzhqvt89o83mbiETZZ3sPvB/Q8Klfl+P hYI1NBM4exMoEcCNSJT3X16Folhl+ZXxZY9QfToP0Un9VSLI3FTzNr3hRjjyPPSKPEHh AC2TMtoiIbPuy3f55kdpI/v+gGjU2OxVoReM860pdykLX6UxCGli3dlUBgCBJ3XSYwyO zsm0pU8Xc27ZT0Y07KP0EqVKxxQRdf0QVWNNcHk0kOcWjUxCOLi92XiiURUwV+7SbK4x UxaJtlmXXCfTa9Kf1jGKHFBPmSFrIWMzA7hDQpfvkJ4jsOD4HVmFsHkQ1GHJ3McDf4F8 0v0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ThQ6Ka763GcQAsux4+Z87JRHK09MzEDNA/Mqm9J+LM0=; b=cGb6zH+Rf5Ub/ZgoVZzvbI9qFnx+uxkXHNuHWC5wzR8JWDHdvXFy61PpnR4o8CBuij baLBZG2hByufMSU2urF7tK+px7pd9z27bjBvPfqU36gbBtpN2Wpz8pmgDDax5WC9JaBt dBUZQaZszPTWO9ia54IcG2xjc8HA+4mKQdcdUK+Nz4K6Fq2BbvmW1vMMtk4NYXazVlbS VZP4QCKmlYXdDKT4ShZK7rMJul0FyNvbIlitN4FJ4V5CHE1WgTqp8x7mI+BJVOFWMrTD 4efVp6EljwkbuHr0Ql858uLlOfk0Ormr5yWr0jxEgN2BhYW6mzwSYI59FmlQHBKPWwVF fOWg== X-Gm-Message-State: APjAAAX/NCdNKjp2KW1Vz6JD6M3ZeQBu7nngZ8gEURhPVF/+V7aGwI83 tiso1t3u/4M5lg3dh1htyrYAkAdOlY21zA== X-Google-Smtp-Source: APXvYqw26Lq/Plc28RU6n1MOUTVKXcpCGxPhpjA8xf2liTom1O15ameUuHFs2Htyn70i4JvnZp2lWg== X-Received: by 2002:a81:af0d:: with SMTP id n13mr5706063ywh.326.1579658407102; Tue, 21 Jan 2020 18:00:07 -0800 (PST) Received: from bobbye-pc.knology.net ([216.186.244.35]) by smtp.gmail.com with ESMTPSA id q185sm17504248ywh.61.2020.01.21.18.00.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 18:00:06 -0800 (PST) From: Bobby Eshleman To: xen-devel@lists.xenproject.org Date: Tue, 21 Jan 2020 19:58:39 -0600 Message-Id: X-Mailer: git-send-email 2.25.0 MIME-Version: 1.0 X-Mailman-Approved-At: Wed, 22 Jan 2020 05:14:01 +0000 Subject: [Xen-devel] [RFC XEN PATCH 00/23] xen: beginning support for RISC-V X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Bobby Eshleman , Stefano Stabellini , Julien Grall , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Andrew Cooper , Ian Jackson , Bobby Eshleman , Dan Robertson , Alistair Francis Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Hey everybody, This is an RFC patchset for the very beginnings of adding RISC-V support to Xen. This RFC is really just to start a dialogue about supporting RISC-V and align with the Xen project and community before going further. For that reason, it is very rough and very incomplete. My name is Bobby Eshleman, I'm a software engineer at Star Lab / Wind River on the ARM team, mostly having worked in the Linux kernel. I've also been involved a good amount with Xen on ARM here, mostly dealing with tooling, deployment, and testing. A lot of this patchset is heavily inspired by the Xen/ARM source code (particularly the early setup up code). Currently, this patchset really only sets up virtual memory for Xen and initializes UART to enable print output. None of RISC-V's virtualization support has been implemented yet, although that is the next road to start going down. Many functions only contain dummy implementations. Many shortcuts have been taken and TODO's have been left accordingly. It is very, very rough. Be forewarned: you are quite likely to see some ungainly code here (despite my efforts to clean it up before sending this patchset out). My intent with this RFC is to align early and gauge interest, as opposed to presenting a totally complete patchset. Because the ARM and RISC-V use cases will likely bear resemblance, the RISC-V port should probably respect the design considerations that have been laid out and respected by Xen on ARM for dom0less, safety certification, etc... My inclination has been to initially target or prioritize dom0less (without excluding dom0full) and use the ARM dom0less implementation as a model to follow. I'd love feedback on this point and on how the Xen project might envision a RISC-V implementation. This patchset has _some_ code for future support for 32-bit, but currently my focus is on 64-bit. Again, this is a very, very rough and totally incomplete patchset. My goal here is just to gauge community interest, begin discussing what Xen on RISC-V may look like, receive feedback, and see if I'm heading in the right direction. My big questions are: Does the Xen project have interest in RISC-V? What can be done to make the RISC-V port as upstreamable as possible? Any major pitfalls? It would be great to hear all of your feedback. Alistair Francis (20): HACK: OE Build changes HACK: Makefile: Don't build Xen tools riscv: makefiles and Kconfig riscv: Add riscv to tools/libxc header files riscv: Add asm-offsets.c riscv: Add delay.c riscv: Add domain.c riscv: Add domctl.c riscv: Add guestcopy.c riscv: Add time.c riscv: Add smp.c riscv: Add shutdown.c riscv: Add traps.c riscv: Add irq.c riscv: Add vm_event.c riscv: Add p2m.c riscv: Add the lib directory riscv: Add smpboot.c riscv: Add percpu.c riscv: Add sysctl.c Bobby Eshleman (3): riscv: header files riscv: early setup code riscv: Add iommu.c Makefile | 13 +- config/StdGNU.mk | 12 +- config/riscv64.mk | 7 + tools/configure | 32 +- tools/firmware/Makefile | 12 +- tools/libxc/include/xenctrl.h | 7 + tools/libxc/xc_core.h | 2 + tools/libxc/xc_core_riscv.h | 57 ++ xen/Makefile | 2 +- xen/Rules.mk | 2 +- xen/arch/Kconfig | 1 + xen/arch/riscv/Kconfig | 36 + xen/arch/riscv/Makefile | 62 ++ xen/arch/riscv/Rules.mk | 55 ++ xen/arch/riscv/asm-offsets.c | 38 + xen/arch/riscv/configs/riscv32_defconfig | 0 xen/arch/riscv/configs/riscv64_defconfig | 0 xen/arch/riscv/delay.c | 114 +++ xen/arch/riscv/domain.c | 273 +++++++ xen/arch/riscv/domctl.c | 53 ++ xen/arch/riscv/guestcopy.c | 158 ++++ xen/arch/riscv/head.S | 180 +++++ xen/arch/riscv/irq.c | 107 +++ xen/arch/riscv/lib/Makefile | 1 + xen/arch/riscv/lib/find_next_bit.c | 284 +++++++ xen/arch/riscv/mm.c | 925 +++++++++++++++++++++++ xen/arch/riscv/p2m.c | 261 +++++++ xen/arch/riscv/percpu.c | 84 ++ xen/arch/riscv/platforms/Kconfig | 31 + xen/arch/riscv/setup.c | 122 +++ xen/arch/riscv/shutdown.c | 24 + xen/arch/riscv/smp.c | 41 + xen/arch/riscv/smpboot.c | 114 +++ xen/arch/riscv/sysctl.c | 31 + xen/arch/riscv/time.c | 74 ++ xen/arch/riscv/traps.c | 56 ++ xen/arch/riscv/vm_event.c | 42 + xen/arch/riscv/xen.lds.S | 262 +++++++ xen/drivers/passthrough/Makefile | 1 + xen/drivers/passthrough/riscv/Makefile | 1 + xen/drivers/passthrough/riscv/iommu.c | 74 ++ xen/include/asm-riscv/altp2m.h | 39 + xen/include/asm-riscv/asm.h | 76 ++ xen/include/asm-riscv/atomic.h | 249 ++++++ xen/include/asm-riscv/bitops.h | 331 ++++++++ xen/include/asm-riscv/bug.h | 59 ++ xen/include/asm-riscv/byteorder.h | 16 + xen/include/asm-riscv/cache.h | 24 + xen/include/asm-riscv/cmpxchg.h | 382 ++++++++++ xen/include/asm-riscv/config.h | 203 +++++ xen/include/asm-riscv/csr.h | 117 +++ xen/include/asm-riscv/current.h | 50 ++ xen/include/asm-riscv/debugger.h | 15 + xen/include/asm-riscv/delay.h | 28 + xen/include/asm-riscv/desc.h | 12 + xen/include/asm-riscv/device.h | 15 + xen/include/asm-riscv/div64.h | 23 + xen/include/asm-riscv/domain.h | 85 +++ xen/include/asm-riscv/event.h | 42 + xen/include/asm-riscv/fence.h | 12 + xen/include/asm-riscv/flushtlb.h | 56 ++ xen/include/asm-riscv/grant_table.h | 93 +++ xen/include/asm-riscv/guest_access.h | 164 ++++ xen/include/asm-riscv/guest_atomics.h | 62 ++ xen/include/asm-riscv/hardirq.h | 27 + xen/include/asm-riscv/hypercall.h | 12 + xen/include/asm-riscv/init.h | 42 + xen/include/asm-riscv/io.h | 283 +++++++ xen/include/asm-riscv/iocap.h | 16 + xen/include/asm-riscv/iommu.h | 49 ++ xen/include/asm-riscv/irq.h | 58 ++ xen/include/asm-riscv/mem_access.h | 35 + xen/include/asm-riscv/mm.h | 308 ++++++++ xen/include/asm-riscv/monitor.h | 65 ++ xen/include/asm-riscv/nospec.h | 25 + xen/include/asm-riscv/numa.h | 41 + xen/include/asm-riscv/p2m.h | 410 ++++++++++ xen/include/asm-riscv/page.h | 327 ++++++++ xen/include/asm-riscv/paging.h | 16 + xen/include/asm-riscv/pci.h | 31 + xen/include/asm-riscv/percpu.h | 34 + xen/include/asm-riscv/pgtable-bits.h | 53 ++ xen/include/asm-riscv/processor.h | 60 ++ xen/include/asm-riscv/random.h | 9 + xen/include/asm-riscv/regs.h | 42 + xen/include/asm-riscv/riscv_encoding.h | 682 +++++++++++++++++ xen/include/asm-riscv/setup.h | 16 + xen/include/asm-riscv/smp.h | 50 ++ xen/include/asm-riscv/softirq.h | 16 + xen/include/asm-riscv/spinlock.h | 13 + xen/include/asm-riscv/string.h | 28 + xen/include/asm-riscv/sysregs.h | 14 + xen/include/asm-riscv/system.h | 96 +++ xen/include/asm-riscv/time.h | 60 ++ xen/include/asm-riscv/trace.h | 12 + xen/include/asm-riscv/types.h | 73 ++ xen/include/asm-riscv/vm_event.h | 61 ++ xen/include/asm-riscv/xenoprof.h | 12 + xen/include/public/arch-riscv.h | 181 +++++ xen/include/public/arch-riscv/hvm/save.h | 39 + xen/include/public/hvm/save.h | 2 + xen/include/public/pmu.h | 2 + xen/include/public/xen.h | 2 + 103 files changed, 9064 insertions(+), 42 deletions(-) create mode 100644 config/riscv64.mk create mode 100644 tools/libxc/xc_core_riscv.h create mode 100644 xen/arch/riscv/Kconfig create mode 100644 xen/arch/riscv/Makefile create mode 100644 xen/arch/riscv/Rules.mk create mode 100644 xen/arch/riscv/asm-offsets.c create mode 100644 xen/arch/riscv/configs/riscv32_defconfig create mode 100644 xen/arch/riscv/configs/riscv64_defconfig create mode 100644 xen/arch/riscv/delay.c create mode 100644 xen/arch/riscv/domain.c create mode 100644 xen/arch/riscv/domctl.c create mode 100644 xen/arch/riscv/guestcopy.c create mode 100644 xen/arch/riscv/head.S create mode 100644 xen/arch/riscv/irq.c create mode 100644 xen/arch/riscv/lib/Makefile create mode 100644 xen/arch/riscv/lib/find_next_bit.c create mode 100644 xen/arch/riscv/mm.c create mode 100644 xen/arch/riscv/p2m.c create mode 100644 xen/arch/riscv/percpu.c create mode 100644 xen/arch/riscv/platforms/Kconfig create mode 100644 xen/arch/riscv/setup.c create mode 100644 xen/arch/riscv/shutdown.c create mode 100644 xen/arch/riscv/smp.c create mode 100644 xen/arch/riscv/smpboot.c create mode 100644 xen/arch/riscv/sysctl.c create mode 100644 xen/arch/riscv/time.c create mode 100644 xen/arch/riscv/traps.c create mode 100644 xen/arch/riscv/vm_event.c create mode 100644 xen/arch/riscv/xen.lds.S create mode 100644 xen/drivers/passthrough/riscv/Makefile create mode 100644 xen/drivers/passthrough/riscv/iommu.c create mode 100644 xen/include/asm-riscv/altp2m.h create mode 100644 xen/include/asm-riscv/asm.h create mode 100644 xen/include/asm-riscv/atomic.h create mode 100644 xen/include/asm-riscv/bitops.h create mode 100644 xen/include/asm-riscv/bug.h create mode 100644 xen/include/asm-riscv/byteorder.h create mode 100644 xen/include/asm-riscv/cache.h create mode 100644 xen/include/asm-riscv/cmpxchg.h create mode 100644 xen/include/asm-riscv/config.h create mode 100644 xen/include/asm-riscv/csr.h create mode 100644 xen/include/asm-riscv/current.h create mode 100644 xen/include/asm-riscv/debugger.h create mode 100644 xen/include/asm-riscv/delay.h create mode 100644 xen/include/asm-riscv/desc.h create mode 100644 xen/include/asm-riscv/device.h create mode 100644 xen/include/asm-riscv/div64.h create mode 100644 xen/include/asm-riscv/domain.h create mode 100644 xen/include/asm-riscv/event.h create mode 100644 xen/include/asm-riscv/fence.h create mode 100644 xen/include/asm-riscv/flushtlb.h create mode 100644 xen/include/asm-riscv/grant_table.h create mode 100644 xen/include/asm-riscv/guest_access.h create mode 100644 xen/include/asm-riscv/guest_atomics.h create mode 100644 xen/include/asm-riscv/hardirq.h create mode 100644 xen/include/asm-riscv/hypercall.h create mode 100644 xen/include/asm-riscv/init.h create mode 100644 xen/include/asm-riscv/io.h create mode 100644 xen/include/asm-riscv/iocap.h create mode 100644 xen/include/asm-riscv/iommu.h create mode 100644 xen/include/asm-riscv/irq.h create mode 100644 xen/include/asm-riscv/mem_access.h create mode 100644 xen/include/asm-riscv/mm.h create mode 100644 xen/include/asm-riscv/monitor.h create mode 100644 xen/include/asm-riscv/nospec.h create mode 100644 xen/include/asm-riscv/numa.h create mode 100644 xen/include/asm-riscv/p2m.h create mode 100644 xen/include/asm-riscv/page.h create mode 100644 xen/include/asm-riscv/paging.h create mode 100644 xen/include/asm-riscv/pci.h create mode 100644 xen/include/asm-riscv/percpu.h create mode 100644 xen/include/asm-riscv/pgtable-bits.h create mode 100644 xen/include/asm-riscv/processor.h create mode 100644 xen/include/asm-riscv/random.h create mode 100644 xen/include/asm-riscv/regs.h create mode 100644 xen/include/asm-riscv/riscv_encoding.h create mode 100644 xen/include/asm-riscv/setup.h create mode 100644 xen/include/asm-riscv/smp.h create mode 100644 xen/include/asm-riscv/softirq.h create mode 100644 xen/include/asm-riscv/spinlock.h create mode 100644 xen/include/asm-riscv/string.h create mode 100644 xen/include/asm-riscv/sysregs.h create mode 100644 xen/include/asm-riscv/system.h create mode 100644 xen/include/asm-riscv/time.h create mode 100644 xen/include/asm-riscv/trace.h create mode 100644 xen/include/asm-riscv/types.h create mode 100644 xen/include/asm-riscv/vm_event.h create mode 100644 xen/include/asm-riscv/xenoprof.h create mode 100644 xen/include/public/arch-riscv.h create mode 100644 xen/include/public/arch-riscv/hvm/save.h