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([94.75.70.14]) by smtp.gmail.com with ESMTPSA id k33-20020a0565123da100b00516a18f9080sm1161237lfv.257.2024.04.03.03.20.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Apr 2024 03:20:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: c4448e7d-f1a3-11ee-a1ef-f123f15fe8a2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1712139616; x=1712744416; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=j0ePPzmBCNAzfDH8XK7KhsPHe5KSob1zyk5Ryt3vSRA=; b=bgMQ4P213DMYzESjmoIb+qx4niZFZxydUH/LTt64JduPi9EtP9OWHm4O6ssXRkG9fP 0ji+dojOzfIIZmmA9xWp8ZkLK6RDqBnfDA/Vw3x3TKVInuFDmtcz940ld2ltTzXFy65u eSKl5AlIho2BK6hOYm8ScAlclp2zj/Aiq/X/Pq+HKhWOxNqj4Wcbn3lgHLFFVE2+fX4q 0lmCjVLDAt5RZIeWReDl95Xu1uRCwBhP2gKkpIJ0CdU50slO4bvsiPp6ic+UJulRBqpQ zqwPqW6o/ubcrPJHOrSAuCt0IRBQlM0jdJtFwdo7H5LCGQtxWedxx/y7RB75ZZmHkuYx ki/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1712139616; x=1712744416; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=j0ePPzmBCNAzfDH8XK7KhsPHe5KSob1zyk5Ryt3vSRA=; b=EX6XILOpQr/bruUm/rkcx5GF7MemNhEkrNdfGyR4R+3WRTRKgCi3vJCI0maKqVHj9m s0O/NDGUBpz6K1RcAt3obO1hFpZDut8HxxX8RiA7yLFaHqECsF8Te3GJ3/4fxSAMKYzE Ldu4GzEt2RczXcRCElQZgRHz2PMWYRg+6G+DEcgrzXlPe5jbLNUzuIHy50RzMAVa7zRG py9ieLsNIvYHxD+kqDXv4xIqnd/NNbQpJadeW7e4rjsGvCxDyOIFQ5L1Xf86ZZ2OpCvn bljEBx+r3CIxmTgzYqD/7BsCHW3NgqHWKtDMoAhfFKeCKbjsakk0Dojo6DX+khF7b1m+ +ohg== X-Gm-Message-State: AOJu0YzyEUVrgUt7EIl8V173F77PTkhgbAyxguqCYKBfOv8bIukfG0D3 9MyYCNgwMI3C9X8YU17oWdpw2SAXn0yH7+rvGGZ0/plpWnFaVoFJgorz7wsm X-Google-Smtp-Source: AGHT+IEJwwljXy4wpeYy82TREFzZE2xLQLbzYiGKa/WizeST1ZRyMLG1eUoAozHwRPERwZbnfdJTJg== X-Received: by 2002:ac2:420a:0:b0:514:cbee:a261 with SMTP id y10-20020ac2420a000000b00514cbeea261mr9750909lfh.27.1712139615859; Wed, 03 Apr 2024 03:20:15 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Doug Goldstein , Stefano Stabellini , Alistair Francis , Bob Eshleman , Connor Davis , Andrew Cooper , George Dunlap , Jan Beulich , Julien Grall , Konrad Rzeszutek Wilk , Ross Lagerwall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Shawn Anastasio , =?utf-8?q?Roger_Pau_Mon?= =?utf-8?q?n=C3=A9?= , Rahul Singh , Tamas K Lengyel , Alexandru Isaila , Petre Pircalabu Subject: [PATCH v7 00/19] Enable build of full Xen for RISC-V Date: Wed, 3 Apr 2024 12:19:53 +0200 Message-ID: X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 This patch series performs all of the additions necessary to drop the build overrides for RISCV and enable the full Xen build. Except in cases where compatibile implementations already exist (e.g. atomic.h and bitops.h), the newly added definitions are simple. The patch series is based on the following patch series: - [PATCH 0/7] xen/bitops: Reduce the mess, starting with ffs() [1] - [PATCH] move __read_mostly to xen/cache.h [2] - [XEN PATCH v2 1/3] xen: introduce STATIC_ASSERT_UNREACHABLE() [3] Right now, the patch series doesn't have a direct dependency on [2] and it provides __read_mostly in the patch: [PATCH v3 26/34] xen/riscv: add definition of __read_mostly However, it will be dropped as soon as [2] is merged or at least when the final version of the patch [2] is provided. [1] https://lore.kernel.org/xen-devel/20240313172716.2325427-1-andrew.cooper3@citrix.com/T/#t [2] https://lore.kernel.org/xen-devel/f25eb5c9-7c14-6e23-8535-2c66772b333e@suse.com/ [3] https://lore.kernel.org/xen-devel/42fc6ae8d3eb802429d29c774502ff232340dc84.1706259490.git.federico.serafini@bugseng.com/ --- Changes in V7: - Patch was merged to staging: [PATCH v6 15/20] xen/riscv: add minimal stuff to processor.h to build full Xen. - Other changes are specific to specific patches. Please look at changes for specific patch. --- Changes in V6: - Update the cover letter message: drop already merged dependecies and add a new one. - Patches were merged to staging: - [PATCH v5 02/23] xen/riscv: use some asm-generic headers ( even v4 was merged to staging branch, I just wasn't apply changes on top of the latest staging branch ) - [PATCH v5 03/23] xen/riscv: introduce nospec.h - [PATCH v5 10/23] xen/riscv: introduces acrquire, release and full barriers - Introduce new patches: - xen/riscv: introduce extenstion support check by compiler - xen/bitops: put __ffs() and ffz() into linux compatible header - xen/bitops: implement fls{l}() in common logic - The following patches were dropped: - drop some patches related to bitops operations as they were introduced in another patch series [...] - introduce new version for generic __ffs(), ffz() and fls{l}(). - Merge patch from patch series "[PATCH v9 0/7] Introduce generic headers" to this patch series as only one patch left in the generic headers patch series and it is more about RISC-V. - Other changes are specific to specific patches. please look at specific patch. --- Changes in V5: - Update the cover letter as one of the dependencies were merged to staging. - Was introduced asm-generic for atomic ops and separate patches for asm-generic bit ops - Moved fence.h to separate patch to deal with some patches dependecies on fence.h - Patches were dropped as they were merged to staging: * [PATCH v4 03/30] xen: add support in public/hvm/save.h for PPC and RISC-V * [PATCH v4 04/30] xen/riscv: introduce cpufeature.h * [PATCH v4 05/30] xen/riscv: introduce guest_atomics.h * [PATCH v4 06/30] xen: avoid generation of empty asm/iommu.h * [PATCH v4 08/30] xen/riscv: introduce setup.h * [PATCH v4 10/30] xen/riscv: introduce flushtlb.h * [PATCH v4 11/30] xen/riscv: introduce smp.h * [PATCH v4 15/30] xen/riscv: introduce irq.h * [PATCH v4 16/30] xen/riscv: introduce p2m.h * [PATCH v4 17/30] xen/riscv: introduce regs.h * [PATCH v4 18/30] xen/riscv: introduce time.h * [PATCH v4 19/30] xen/riscv: introduce event.h * [PATCH v4 22/30] xen/riscv: define an address of frame table - Other changes are specific to specific patches. please look at specific patch --- Changes in V4: - Update the cover letter message: new patch series dependencies. - Some patches were merged to staging, so they were dropped in this patch series: [PATCH v3 09/34] xen/riscv: introduce system.h [PATCH v3 18/34] xen/riscv: introduce domain.h [PATCH v3 19/34] xen/riscv: introduce guest_access.h - Was sent out of this patch series: [PATCH v3 16/34] xen/lib: introduce generic find next bit operations - [PATCH v3 17/34] xen/riscv: add compilation of generic find-next-bit.c was droped as CONFIG_GENERIC_FIND_NEXT_BIT was dropped. - All other changes are specific to a specific patch. --- Changes in V3: - Update the cover letter message - The following patches were dropped as they were merged to staging: [PATCH v2 03/39] xen/riscv:introduce asm/byteorder.h [PATCH v2 04/39] xen/riscv: add public arch-riscv.h [PATCH v2 05/39] xen/riscv: introduce spinlock.h [PATCH v2 20/39] xen/riscv: define bug frame tables in xen.lds.S [PATCH v2 34/39] xen: add RISCV support for pmu.h [PATCH v2 35/39] xen: add necessary headers to common to build full Xen for RISC-V - Instead of the following patches were introduced new: [PATCH v2 10/39] xen/riscv: introduce asm/iommu.h [PATCH v2 11/39] xen/riscv: introduce asm/nospec.h - remove "asm/" for commit messages which start with "xen/riscv:" - code style updates. - add emulation of {cmp}xchg_* for 1 and 2 bytes types. - code style fixes. - add SPDX and footer for the newly added headers. - introduce generic find-next-bit.c. - some other mionor changes. ( details please find in a patch ) --- Changes in V2: - Drop the following patches as they are the part of [2]: [PATCH v1 06/57] xen/riscv: introduce paging.h [PATCH v1 08/57] xen/riscv: introduce asm/device.h [PATCH v1 10/57] xen/riscv: introduce asm/grant_table.h [PATCH v1 12/57] xen/riscv: introduce asm/hypercall.h [PATCH v1 13/57] xen/riscv: introduce asm/iocap.h [PATCH v1 15/57] xen/riscv: introduce asm/mem_access.h [PATCH v1 18/57] xen/riscv: introduce asm/random.h [PATCH v1 21/57] xen/riscv: introduce asm/xenoprof.h [PATCH v1 24/57] xen/riscv: introduce asm/percpu.h [PATCH v1 29/57] xen/riscv: introduce asm/hardirq.h [PATCH v1 33/57] xen/riscv: introduce asm/altp2m.h [PATCH v1 38/57] xen/riscv: introduce asm/monitor.h [PATCH v1 39/57] xen/riscv: introduce asm/numa.h [PATCH v1 42/57] xen/riscv: introduce asm/softirq.h - xen/lib.h in most of the cases were changed to xen/bug.h as mostly functionilty of bug.h is used. - align arch-riscv.h with Arm's version of it. - change the Author of commit with introduction of asm/atomic.h. - update some definition from spinlock.h. - code style changes. --- Oleksii Kurochko (19): automation: introduce fixed randconfig for RISC-V xen/riscv: disable unnecessary configs xen/riscv: introduce extenstion support check by compiler xen: introduce generic non-atomic test_*bit() xen/bitops: implement fls{l}() in common logic xen/bitops: put __ffs() into linux compatible header xen/riscv: introduce bitops.h xen/riscv: introduce cmpxchg.h xen/riscv: introduce io.h xen/riscv: introduce atomic.h xen/riscv: introduce monitor.h xen/riscv: add definition of __read_mostly xen/riscv: add required things to current.h xen/riscv: add minimal stuff to page.h to build full Xen xen/riscv: add minimal stuff to mm.h to build full Xen xen/riscv: introduce vm_event_*() functions xen/riscv: add minimal amount of stubs to build full Xen xen/riscv: enable full Xen build xen/README: add compiler and binutils versions for RISC-V64 README | 4 + automation/gitlab-ci/build.yaml | 19 +- docs/misc/riscv/booting.txt | 16 + xen/arch/arm/arm64/livepatch.c | 1 - xen/arch/arm/include/asm/arm32/bitops.h | 2 +- xen/arch/arm/include/asm/arm64/bitops.h | 27 +- xen/arch/arm/include/asm/bitops.h | 74 +---- xen/arch/ppc/include/asm/bitops.h | 76 ----- xen/arch/ppc/include/asm/page.h | 2 +- xen/arch/ppc/mm-radix.c | 2 +- xen/arch/riscv/Makefile | 18 +- xen/arch/riscv/arch.mk | 19 +- xen/arch/riscv/configs/tiny64_defconfig | 11 +- xen/arch/riscv/early_printk.c | 168 ---------- xen/arch/riscv/include/asm/atomic.h | 261 +++++++++++++++ xen/arch/riscv/include/asm/bitops.h | 146 +++++++++ xen/arch/riscv/include/asm/cache.h | 2 + xen/arch/riscv/include/asm/cmpxchg.h | 227 +++++++++++++ xen/arch/riscv/include/asm/config.h | 2 + xen/arch/riscv/include/asm/current.h | 19 ++ xen/arch/riscv/include/asm/io.h | 168 ++++++++++ xen/arch/riscv/include/asm/mm.h | 240 ++++++++++++++ xen/arch/riscv/include/asm/monitor.h | 26 ++ xen/arch/riscv/include/asm/page.h | 19 ++ xen/arch/riscv/mm.c | 52 ++- xen/arch/riscv/setup.c | 10 +- xen/arch/riscv/stubs.c | 415 ++++++++++++++++++++++++ xen/arch/riscv/traps.c | 25 ++ xen/arch/riscv/vm_event.c | 19 ++ xen/arch/x86/include/asm/bitops.h | 34 +- xen/common/bitops.c | 22 ++ xen/drivers/passthrough/arm/smmu-v3.c | 2 + xen/include/asm-generic/atomic-ops.h | 97 ++++++ xen/include/xen/bitops.h | 154 +++++++++ xen/include/xen/linux-compat.h | 2 + xen/lib/find-next-bit.c | 3 + 36 files changed, 1999 insertions(+), 385 deletions(-) create mode 100644 docs/misc/riscv/booting.txt create mode 100644 xen/arch/riscv/include/asm/atomic.h create mode 100644 xen/arch/riscv/include/asm/bitops.h create mode 100644 xen/arch/riscv/include/asm/cmpxchg.h create mode 100644 xen/arch/riscv/include/asm/io.h create mode 100644 xen/arch/riscv/include/asm/monitor.h create mode 100644 xen/arch/riscv/stubs.c create mode 100644 xen/arch/riscv/vm_event.c create mode 100644 xen/include/asm-generic/atomic-ops.h