mbox series

[XEN,v2,0/4] x86: address violations of MISRA C Rule 16.3

Message ID cover.1728308312.git.federico.serafini@bugseng.com (mailing list archive)
Headers show
Series x86: address violations of MISRA C Rule 16.3 | expand

Message

Federico Serafini Oct. 7, 2024, 2:16 p.m. UTC 
If these 4 patches will be committed, only 4 violations will be left:
these are under x86_emulate and involve some fallthrough cases.
I'll wait for instructions from x86 maintainers about the right "format" to make
the fallthrough intention explicit (i.e., a comment or the fallthrough keyword
that is not defined in x86-emulate.h at the moment).

Federico Serafini (4):
  x86/emul: add defensive code
  x86/emul: address violations of MISRA C Rule 16.3
  xen/vpci: address violations of MISRA C Rule 16.3
  xen/pci: address a violation of MISRA C Rule 16.3

 xen/arch/x86/x86_emulate/fpu.c         | 5 +++++
 xen/arch/x86/x86_emulate/x86_emulate.c | 3 +++
 xen/drivers/passthrough/pci.c          | 4 +++-
 xen/drivers/vpci/msix.c                | 2 ++
 4 files changed, 13 insertions(+), 1 deletion(-)

Comments

Jan Beulich Oct. 7, 2024, 2:28 p.m. UTC | #1 
On 07.10.2024 16:16, Federico Serafini wrote:
> @@ -457,6 +460,8 @@ int x86emul_fpu(struct x86_emulate_state *s,
>              case 7: /* fistp m64i */
>                  goto fpu_memdst64;
>              }
> +            ASSERT_UNREACHABLE();
> +            break;

"return X86EMUL_UNHANDLEABLE" like is also used just a few lines down
from here?

Jan