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[v2,0/2,4.15] x86: guest MSR access handling tweaks

Message ID f5f17207-b601-2909-8a5c-55276e734272@suse.com (mailing list archive)
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Series x86: guest MSR access handling tweaks | expand

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Jan Beulich March 5, 2021, 9:43 a.m. UTC
The first patch was stripped of its WRMSR adjustments, albeit I'm
not convinced we'll get away with this - see there. v2 there also
addresses further comments. The 2nd patch is new here, but the
need for something like this was mentioned in v1 already.

1: PV: conditionally avoid raising #GP for early guest MSR reads
2: AMD: expose HWCR.TscFreqSel to guests

Jan