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Message-ID: <09fc4c14-07e8-4e59-a23e-bb295125f25a@suse.com> Date: Tue, 28 Nov 2023 11:35:46 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v3 5/6] x86/vPIC: vpic_elcr_mask() master bit 2 control Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= References: <49a17ffa-c873-4b0f-81ed-9587053ca159@suse.com> Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <49a17ffa-c873-4b0f-81ed-9587053ca159@suse.com> X-ClientProxiedBy: FR4P281CA0444.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:c6::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|AS8PR04MB7542:EE_ X-MS-Office365-Filtering-Correlation-Id: 1f3085dd-4f66-4b88-8f68-08dbeffdc876 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?e74vv8j9uHTtvy7TWb6loFSeWf+V?= =?utf-8?q?a3Szdls5daf00VzLO6rPUSKQN5sQZ/6SnbU18ztqmxSpv7IJe2v6l65J6WE5juR4X?= =?utf-8?q?YeEOB7XeZ+vPsPXTmPtrTQcwarR4j2C9qho8G2BmbLRbPX/0+Mbb9OXiLfZlZbwkG?= =?utf-8?q?Szg53EaOIruYF0+vp8iVks2WY2/ecCcyZYvq5qUSk7Vvctpq5t0yqd9XgOoW3ZFs0?= =?utf-8?q?KVEki2vNiUNlKEDETccs/MZ7XhuPeCt/YRpGnpZEv5s1e4/Xfvy3Ugcs7LpNXbDrZ?= =?utf-8?q?BHsvV6QPggpLN9T0S5Xp0JM+ajenc06yrr88Ibw3ePAt5DJ0ivLQD6Xtu5f8vkPVm?= =?utf-8?q?KPOtWyzKx2Ce+IOztKfmP3ZjsO6Ezh9ntBRdKWoh/9alLIpSOrpmRisgp8iJXBIyZ?= =?utf-8?q?QkuH+jM4aLIxZIhbS4H6MPpqzVC5nzXVUq37MCropqtuLSC9NnLp7aOR98bhMXmEL?= =?utf-8?q?h4R8Ol4EvQwP0guil3DREHsXE9UMer99r0KKZH+MBQyD+6QDf3WssR0yVb9Yog0LZ?= =?utf-8?q?P3gRZct3cyUnE+Jav6m6D2wwMuWp/601JCYJU91jx6XNLcvvdzUHn1Z8MdKgz8kDr?= =?utf-8?q?wxyAB7m6ipDNl2x/0KpG37pViHreRxxcoCDD4GFDbEhozJ4XCRf8x/as/xTkiOJEk?= =?utf-8?q?e58w8PjGDSV+AIpTs76djCr/qZ5L0wz1VYE6Mq52HiZzkOrOTqzeteKmMxQ0vhK8B?= =?utf-8?q?PQic5pU/21YN7q6JCzuPxIlx9mKFOZZ+stYo/O5mEEQCWBv2ZheoP5iFaMuSkZbiN?= =?utf-8?q?Xwv8UgwYgfeNdBx/qrQlWCkHE0+PRnv2Y29Q8rka0IjqAWgt044mbTW6y8m8joGUn?= =?utf-8?q?HIK8qKr/i59kzMqLAIvEkmsWqNUCcdtjYfTy0S7ON5o0Qq/PfBRHGJJqKc3bJymYW?= =?utf-8?q?Pde5a59jjhthV6cw7cUa/p0G8B/6i1BcBMgxUZrQ7c7ypMul0xVrXV8kriRjGeW/r?= =?utf-8?q?qlvEkiTRcOqJzfs68V80npmnqSNVRhTa9Zfot1FGDOv+XlUEa+UgWGyRWBdbnpPHR?= =?utf-8?q?oLKekmICC9WNR/NeuhlgcIp5SNAv1oTQwnv+nz8K3QFRv39sBnudAoY6KjGY23mOr?= =?utf-8?q?wpboqSFIc68ydULUfudglnbjwHuxiNTrZ6WTE5D0gRxog98gy3kmfk7oj5TaOE2FS?= =?utf-8?q?Tm5vCVxvr2MHax24U76iQk6KztQwSfYQ/TGbHSSqukr8O0CNLlPwzWEJj1V1yT4cl?= =?utf-8?q?uO4LlzyrJt13SAABaiTcwiKVMTfYycKkiGekUoGEdhTBQ8pZlLcreuqDNPeXAB0GU?= =?utf-8?q?s/R5QxXtCxQu/Kyoixf0aonH8bCEe30N5uDkDm0Z9Lh72sTBHA1ZbQ2qhw+NfsatN?= =?utf-8?q?WU/0kVh95LV2LH2rQCWawcMmNt87ieAx92rgB2sOsFkAbRI2L/VTT8w+YqNiCDxpN?= =?utf-8?q?jgM84azMPRtOrxKZsTcV+Iixre6Z8NWHcEAdWwlgZmwIMtaNlHju55AJ94iVtM1E6?= =?utf-8?q?krq8INImsEp1Cy4NkQQyuJBOelVw1h5Cb0sAHj8YFrPv+XBvYWsKG0Ftr4znpCr/2?= =?utf-8?q?LER4DFbZP1TG?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1f3085dd-4f66-4b88-8f68-08dbeffdc876 X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8790.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Nov 2023 10:35:47.3135 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rjF7BD+Ezlv/OduflxeWaBcQrP+fLq1nI2B9/zfvPLjiHCMBMcJmWWGo6/nf8Fvu3l8/SqgmlNDWdkkbOI8Y0w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB7542 Master bit 2 is treated specially: We force it set, but we don't expose the bit being set to the guest. While right now the read and write handling can easily use the fixed mask, the restore input checking that is about to be put in place wants to use the inverted mask to prove that no bits are unduly set. That will require master bit 2 to be set. Otoh the read path requires the bit to be clear (the bit can have either value for the use on the write path). Hence allow use sites control over that bit. Signed-off-by: Jan Beulich Reviewed-by: Roger Pau Monné --- v3: New, split from larger patch. --- I'm certainly open to naming suggestions for the new macro parameter. "mb2" can certainly be misleading as to Multiboot 2. Yet "master_bit_2" it too long for my taste, not the least because of the macro then needing to be split across lines. --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -41,7 +41,7 @@ #define vpic_lock(v) spin_lock(__vpic_lock(v)) #define vpic_unlock(v) spin_unlock(__vpic_lock(v)) #define vpic_is_locked(v) spin_is_locked(__vpic_lock(v)) -#define vpic_elcr_mask(v) ((v)->is_master ? 0xf8 : 0xde) +#define vpic_elcr_mask(v, mb2) ((v)->is_master ? 0xf8 | ((mb2) << 2) : 0xde) /* Return the highest priority found in mask. Return 8 if none. */ #define VPIC_PRIO_NONE 8 @@ -387,7 +387,7 @@ static int cf_check vpic_intercept_elcr_ if ( dir == IOREQ_WRITE ) { /* Some IRs are always edge trig. Slave IR is always level trig. */ - data = (*val >> shift) & vpic_elcr_mask(vpic); + data = (*val >> shift) & vpic_elcr_mask(vpic, 1); if ( vpic->is_master ) data |= 1 << 2; vpic->elcr = data; @@ -395,7 +395,7 @@ static int cf_check vpic_intercept_elcr_ else { /* Reader should not see hardcoded level-triggered slave IR. */ - data = vpic->elcr & vpic_elcr_mask(vpic); + data = vpic->elcr & vpic_elcr_mask(vpic, 0); if ( !shift ) *val = data; else