From patchwork Thu Dec 31 03:03:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 7935331 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 69F2BBEEE5 for ; Thu, 31 Dec 2015 03:07:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 7BF3A201FE for ; Thu, 31 Dec 2015 03:07:30 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 82D6F20220 for ; Thu, 31 Dec 2015 03:07:29 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aETXV-0000Jj-10; Thu, 31 Dec 2015 03:04:33 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aETXT-0000Je-QW for xen-devel@lists.xen.org; Thu, 31 Dec 2015 03:04:31 +0000 Received: from [85.158.143.35] by server-2.bemta-4.messagelabs.com id 61/99-18316-F3B94865; Thu, 31 Dec 2015 03:04:31 +0000 X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-3.tower-21.messagelabs.com!1451531069!7367736!1 X-Originating-IP: [192.55.52.120] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 55489 invoked from network); 31 Dec 2015 03:04:30 -0000 Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by server-3.tower-21.messagelabs.com with SMTP; 31 Dec 2015 03:04:30 -0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga104.fm.intel.com with ESMTP; 30 Dec 2015 19:04:29 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,503,1444719600"; d="scan'208";a="851077210" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.13.40]) by orsmga001.jf.intel.com with ESMTP; 30 Dec 2015 19:04:27 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org, Jan Beulich , Boris Ostrovsky , Kevin Tian Date: Thu, 31 Dec 2015 11:03:28 +0800 Message-Id: <1451531020-29964-2-git-send-email-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.4.8 In-Reply-To: <1451531020-29964-1-git-send-email-haozhong.zhang@intel.com> References: <1451531020-29964-1-git-send-email-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Keir Fraser , Suravee Suthikulpanit , Andrew Cooper , Aravind Gopalakrishnan , Jun Nakajima Subject: [Xen-devel] [PATCH v3 01/13] x86/time.c: Use correct guest TSC frequency in tsc_set_info() X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When TSC_MODE_PVRDTSCP is used for a HVM container and TSC scaling is available, use the non-zero value of argument gtsc_khz of tsc_set_info() as the guest TSC frequency rather than using the host TSC frequency. Otherwise, TSC scaling will not be able get the correct ratio between the host and guest TSC frequencies. Signed-off-by: Haozhong Zhang Reviewed-by: Boris Ostrovsky --- Changes in v3: (addressing Boris Ostrovsky's comments) * Add the missing ! before d->arch.vtsc when initializing enable_tsc_scaling. * Use this_cpu(cpu_time).tsc_scale for both scaling and non-scaling cases. * Adapt comments for some TSC-related fields in struct arch_domain. xen/arch/x86/time.c | 9 +++++++-- xen/include/asm-x86/domain.h | 9 ++++++--- 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index b5223cf..0059b6a 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1803,6 +1803,8 @@ void tsc_set_info(struct domain *d, uint32_t tsc_mode, uint64_t elapsed_nsec, uint32_t gtsc_khz, uint32_t incarnation) { + bool_t enable_tsc_scaling; + if ( is_idle_domain(d) || is_hardware_domain(d) ) { d->arch.vtsc = 0; @@ -1864,7 +1866,9 @@ void tsc_set_info(struct domain *d, case TSC_MODE_PVRDTSCP: d->arch.vtsc = !boot_cpu_has(X86_FEATURE_RDTSCP) || !host_tsc_is_safe(); - d->arch.tsc_khz = cpu_khz; + enable_tsc_scaling = has_hvm_container_domain(d) && + cpu_has_tsc_ratio && !d->arch.vtsc; + d->arch.tsc_khz = (enable_tsc_scaling && gtsc_khz) ? gtsc_khz : cpu_khz; set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000 ); d->arch.ns_to_vtsc = scale_reciprocal(d->arch.vtsc_to_ns); if ( d->arch.vtsc ) @@ -1872,7 +1876,8 @@ void tsc_set_info(struct domain *d, else { /* when using native TSC, offset is nsec relative to power-on * of physical machine */ - d->arch.vtsc_offset = scale_delta(rdtsc(), &d->arch.vtsc_to_ns) - + d->arch.vtsc_offset = scale_delta(rdtsc(), + &this_cpu(cpu_time).tsc_scale) - elapsed_nsec; } break; diff --git a/xen/include/asm-x86/domain.h b/xen/include/asm-x86/domain.h index e8f7037..405adef 100644 --- a/xen/include/asm-x86/domain.h +++ b/xen/include/asm-x86/domain.h @@ -347,9 +347,12 @@ struct arch_domain s_time_t vtsc_last; /* previous TSC value (guarantee monotonicity) */ spinlock_t vtsc_lock; uint64_t vtsc_offset; /* adjustment for save/restore/migrate */ - uint32_t tsc_khz; /* cached khz for certain emulated cases */ - struct time_scale vtsc_to_ns; /* scaling for certain emulated cases */ - struct time_scale ns_to_vtsc; /* scaling for certain emulated cases */ + uint32_t tsc_khz; /* cached guest khz for certain emulated or + hardware TSC scaling cases */ + struct time_scale vtsc_to_ns; /* scaling for certain emulated or + hardware TSC scaling cases */ + struct time_scale ns_to_vtsc; /* scaling for certain emulated or + hardware TSC scaling cases */ uint32_t incarnation; /* incremented every restore or live migrate (possibly other cases in the future */ #if !defined(NDEBUG) || defined(PERF_COUNTERS)