From patchwork Fri Jan 8 10:46:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 7984291 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A0D5B9F744 for ; Fri, 8 Jan 2016 10:49:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C0BE120149 for ; Fri, 8 Jan 2016 10:49:51 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 872DF20138 for ; Fri, 8 Jan 2016 10:49:50 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aHUZZ-00080a-GJ; Fri, 08 Jan 2016 10:47:09 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aHUZY-00080D-6i for xen-devel@lists.xen.org; Fri, 08 Jan 2016 10:47:08 +0000 Received: from [85.158.137.68] by server-6.bemta-3.messagelabs.com id 0D/E5-29649-BA39F865; Fri, 08 Jan 2016 10:47:07 +0000 X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-6.tower-31.messagelabs.com!1452250025!14649800!1 X-Originating-IP: [134.134.136.65] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 55553 invoked from network); 8 Jan 2016 10:47:06 -0000 Received: from mga03.intel.com (HELO mga03.intel.com) (134.134.136.65) by server-6.tower-31.messagelabs.com with SMTP; 8 Jan 2016 10:47:06 -0000 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP; 08 Jan 2016 02:46:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,538,1444719600"; d="scan'208";a="630103411" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.13.102]) by FMSMGA003.fm.intel.com with ESMTP; 08 Jan 2016 02:46:49 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org, Andrew Cooper , Wei Liu , Jan Beulich , Kevin Tian Date: Fri, 8 Jan 2016 18:46:26 +0800 Message-Id: <1452249987-31776-2-git-send-email-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.4.8 In-Reply-To: <1452249987-31776-1-git-send-email-haozhong.zhang@intel.com> References: <1452249987-31776-1-git-send-email-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Keir Fraser , Ian Campbell , Stefano Stabellini , Ian Jackson , Jun Nakajima Subject: [Xen-devel] [PATCH XEN v3 1/2] x86/hvm: allow guest to use clflushopt and clwb X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Pass CPU features CLFLUSHOPT and CLWB into HVM domain so that those two instructions can be used by guest. The specification of above two instructions can be found in https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf Reviewed-by: Andrew Cooper Reviewed-by: Kevin Tian Acked-by: Wei Liu for tools bits Signed-off-by: Haozhong Zhang --- tools/libxc/xc_cpufeature.h | 3 ++- tools/libxc/xc_cpuid_x86.c | 4 +++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h index c3ddc80..5288ac6 100644 --- a/tools/libxc/xc_cpufeature.h +++ b/tools/libxc/xc_cpufeature.h @@ -140,6 +140,7 @@ #define X86_FEATURE_RDSEED 18 /* RDSEED instruction */ #define X86_FEATURE_ADX 19 /* ADCX, ADOX instructions */ #define X86_FEATURE_SMAP 20 /* Supervisor Mode Access Protection */ - +#define X86_FEATURE_CLFLUSHOPT 23 /* CLFLUSHOPT instruction */ +#define X86_FEATURE_CLWB 24 /* CLWB instruction */ #endif /* __LIBXC_CPUFEATURE_H */ diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c index 8882c01..fecfd6c 100644 --- a/tools/libxc/xc_cpuid_x86.c +++ b/tools/libxc/xc_cpuid_x86.c @@ -426,7 +426,9 @@ static void xc_cpuid_hvm_policy(xc_interface *xch, bitmaskof(X86_FEATURE_RDSEED) | bitmaskof(X86_FEATURE_ADX) | bitmaskof(X86_FEATURE_SMAP) | - bitmaskof(X86_FEATURE_FSGSBASE)); + bitmaskof(X86_FEATURE_FSGSBASE) | + bitmaskof(X86_FEATURE_CLWB) | + bitmaskof(X86_FEATURE_CLFLUSHOPT)); } else regs[1] = 0; regs[0] = regs[2] = regs[3] = 0;