@@ -338,6 +338,9 @@ void hvm_setup_tsc_scaling(struct vcpu *v)
{
v->arch.hvm_vcpu.tsc_scaling_ratio =
hvm_get_tsc_scaling_ratio(v->domain->arch.tsc_khz);
+
+ if ( hvm_funcs.setup_tsc_scaling )
+ hvm_funcs.setup_tsc_scaling(v);
}
void hvm_set_guest_tsc_fixed(struct vcpu *v, u64 guest_tsc, u64 at_tsc)
@@ -149,6 +149,7 @@ static void __init vmx_display_features(void)
P(cpu_has_vmx_vmfunc, "VM Functions");
P(cpu_has_vmx_virt_exceptions, "Virtualisation Exceptions");
P(cpu_has_vmx_pml, "Page Modification Logging");
+ P(cpu_has_vmx_tsc_scaling, "TSC Scaling");
#undef P
if ( !printed )
@@ -242,7 +243,8 @@ static int vmx_init_vmcs_config(void)
SECONDARY_EXEC_ENABLE_INVPCID |
SECONDARY_EXEC_ENABLE_VM_FUNCTIONS |
SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS |
- SECONDARY_EXEC_XSAVES);
+ SECONDARY_EXEC_XSAVES |
+ SECONDARY_EXEC_TSC_SCALING);
rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
if ( _vmx_misc_cap & VMX_MISC_VMWRITE_ALL )
opt |= SECONDARY_EXEC_ENABLE_VMCS_SHADOWING;
@@ -999,7 +1001,7 @@ static int construct_vmcs(struct vcpu *v)
__vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_control);
v->arch.hvm_vmx.exec_control = vmx_cpu_based_exec_control;
- if ( d->arch.vtsc )
+ if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling )
v->arch.hvm_vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
v->arch.hvm_vmx.secondary_exec_control = vmx_secondary_exec_control;
@@ -1281,6 +1283,9 @@ static int construct_vmcs(struct vcpu *v)
if ( cpu_has_vmx_xsaves )
__vmwrite(XSS_EXIT_BITMAP, 0);
+ if ( cpu_has_vmx_tsc_scaling )
+ __vmwrite(TSC_MULTIPLIER, v->arch.hvm_vcpu.tsc_scaling_ratio);
+
vmx_vmcs_exit(v);
/* PVH: paging mode is updated by arch_set_info_guest(). */
@@ -1863,7 +1868,8 @@ void vmcs_dump_vcpu(struct vcpu *v)
vmr32(VM_EXIT_REASON), vmr(EXIT_QUALIFICATION));
printk("IDTVectoring: info=%08x errcode=%08x\n",
vmr32(IDT_VECTORING_INFO), vmr32(IDT_VECTORING_ERROR_CODE));
- printk("TSC Offset = 0x%016lx\n", vmr(TSC_OFFSET));
+ printk("TSC Offset = 0x%016lx TSC Multiplier = 0x%016lx\n",
+ vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER));
if ( (v->arch.hvm_vmx.exec_control & CPU_BASED_TPR_SHADOW) ||
(vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) )
printk("TPR Threshold = 0x%02x PostedIntrVec = 0x%02x\n",
@@ -115,6 +115,7 @@ static int vmx_vcpu_initialise(struct vcpu *v)
v->arch.schedule_tail = vmx_do_resume;
v->arch.ctxt_switch_from = vmx_ctxt_switch_from;
v->arch.ctxt_switch_to = vmx_ctxt_switch_to;
+ v->arch.hvm_vcpu.tsc_scaling_ratio = VMX_TSC_MULTIPLIER_DEFAULT;
if ( (rc = vmx_create_vmcs(v)) != 0 )
{
@@ -1105,6 +1106,13 @@ static void vmx_handle_cd(struct vcpu *v, unsigned long value)
}
}
+static void vmx_setup_tsc_scaling(struct vcpu *v)
+{
+ vmx_vmcs_enter(v);
+ __vmwrite(TSC_MULTIPLIER, v->arch.hvm_vcpu.tsc_scaling_ratio);
+ vmx_vmcs_exit(v);
+}
+
static void vmx_set_tsc_offset(struct vcpu *v, u64 offset, u64 at_tsc)
{
vmx_vmcs_enter(v);
@@ -2003,6 +2011,10 @@ static struct hvm_function_table __initdata vmx_function_table = {
.altp2m_vcpu_update_vmfunc_ve = vmx_vcpu_update_vmfunc_ve,
.altp2m_vcpu_emulate_ve = vmx_vcpu_emulate_ve,
.altp2m_vcpu_emulate_vmfunc = vmx_vcpu_emulate_vmfunc,
+ .default_tsc_scaling_ratio = VMX_TSC_MULTIPLIER_DEFAULT,
+ .max_tsc_scaling_ratio = VMX_TSC_MULTIPLIER_MAX,
+ .tsc_scaling_ratio_frac_bits = 48,
+ .setup_tsc_scaling = vmx_setup_tsc_scaling,
};
/* Handle VT-d posted-interrupt when VCPU is running. */
@@ -2107,6 +2119,14 @@ const struct hvm_function_table * __init start_vmx(void)
&& cpu_has_vmx_secondary_exec_control )
vmx_function_table.pvh_supported = 1;
+ if ( cpu_has_vmx_tsc_scaling )
+ {
+ vmx_function_table.default_tsc_scaling_ratio = VMX_TSC_MULTIPLIER_DEFAULT;
+ vmx_function_table.max_tsc_scaling_ratio = VMX_TSC_MULTIPLIER_MAX;
+ vmx_function_table.tsc_scaling_ratio_frac_bits = 48;
+ vmx_function_table.setup_tsc_scaling = vmx_setup_tsc_scaling;
+ }
+
setup_vmcs_dump();
return &vmx_function_table;
@@ -223,6 +223,9 @@ struct hvm_function_table {
void (*altp2m_vcpu_update_vmfunc_ve)(struct vcpu *v);
bool_t (*altp2m_vcpu_emulate_ve)(struct vcpu *v);
int (*altp2m_vcpu_emulate_vmfunc)(struct cpu_user_regs *regs);
+
+ /* Architecture function to setup TSC scaling ratio */
+ void (*setup_tsc_scaling)(struct vcpu *v);
};
extern struct hvm_function_table hvm_funcs;
@@ -236,6 +236,7 @@ extern u32 vmx_vmentry_control;
#define SECONDARY_EXEC_ENABLE_PML 0x00020000
#define SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS 0x00040000
#define SECONDARY_EXEC_XSAVES 0x00100000
+#define SECONDARY_EXEC_TSC_SCALING 0x02000000
extern u32 vmx_secondary_exec_control;
#define VMX_EPT_EXEC_ONLY_SUPPORTED 0x00000001
@@ -258,6 +259,9 @@ extern u64 vmx_ept_vpid_cap;
#define VMX_MISC_CR3_TARGET 0x01ff0000
#define VMX_MISC_VMWRITE_ALL 0x20000000
+#define VMX_TSC_MULTIPLIER_DEFAULT 0x0001000000000000ULL
+#define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL
+
#define cpu_has_wbinvd_exiting \
(vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING)
#define cpu_has_vmx_virtualize_apic_accesses \
@@ -303,6 +307,8 @@ extern u64 vmx_ept_vpid_cap;
(vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML)
#define cpu_has_vmx_xsaves \
(vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES)
+#define cpu_has_vmx_tsc_scaling \
+ (vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING)
#define VMCS_RID_TYPE_MASK 0x80000000
@@ -378,6 +384,7 @@ enum vmcs_field {
VMWRITE_BITMAP = 0x00002028,
VIRT_EXCEPTION_INFO = 0x0000202a,
XSS_EXIT_BITMAP = 0x0000202c,
+ TSC_MULTIPLIER = 0x00002032,
GUEST_PHYSICAL_ADDRESS = 0x00002400,
VMCS_LINK_POINTER = 0x00002800,
GUEST_IA32_DEBUGCTL = 0x00002802,