From patchwork Sun Jan 17 21:58:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 8051061 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 74F73BEEED for ; Sun, 17 Jan 2016 22:04:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 85A24205E5 for ; Sun, 17 Jan 2016 22:04:35 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C109F205E1 for ; Sun, 17 Jan 2016 22:03:47 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aKvN1-0003Pg-8Q; Sun, 17 Jan 2016 22:00:23 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aKvN0-0003Of-Fi for xen-devel@lists.xen.org; Sun, 17 Jan 2016 22:00:22 +0000 Received: from [85.158.139.211] by server-9.bemta-5.messagelabs.com id 4D/9B-30270-5FE0C965; Sun, 17 Jan 2016 22:00:21 +0000 X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-14.tower-206.messagelabs.com!1453068020!16051071!1 X-Originating-IP: [192.55.52.93] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTkyLjU1LjUyLjkzID0+IDMyNDY2NQ==\n X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 50339 invoked from network); 17 Jan 2016 22:00:20 -0000 Received: from mga11.intel.com (HELO mga11.intel.com) (192.55.52.93) by server-14.tower-206.messagelabs.com with SMTP; 17 Jan 2016 22:00:20 -0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP; 17 Jan 2016 14:00:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,309,1449561600"; d="scan'208";a="883522049" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.13.26]) by fmsmga001.fm.intel.com with ESMTP; 17 Jan 2016 14:00:17 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org, Jan Beulich , Boris Ostrovsky , Kevin Tian Date: Mon, 18 Jan 2016 05:58:53 +0800 Message-Id: <1453067939-9121-5-git-send-email-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.4.8 In-Reply-To: <1453067939-9121-1-git-send-email-haozhong.zhang@intel.com> References: <1453067939-9121-1-git-send-email-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Keir Fraser , Suravee Suthikulpanit , Andrew Cooper , Aravind Gopalakrishnan , Jun Nakajima Subject: [Xen-devel] [PATCH v4 04/10] x86/hvm: Collect information of TSC scaling ratio X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Both VMX TSC scaling and SVM TSC ratio use the 64-bit TSC scaling ratio, but the number of fractional bits of the ratio is different between VMX and SVM. This patch adds the architecture code to collect the number of fractional bits and other related information into fields of struct hvm_function_table so that they can be used in the common code. Signed-off-by: Haozhong Zhang Reviewed-by: Kevin Tian Reviewed-by: Boris Ostrovsky --- Changes in v4: (addressing Jan Beulich's comments in v3 patch 12) * Set TSC scaling parameters in hvm_funcs conditionally. * Remove TSC scaling parameter tsc_scaling_supported in hvm_funcs which can be derived from other parameters. (code cleanup) * Merge with v3 patch 11 "x86/hvm: Detect TSC scaling through hvm_funcs" whose work can be done early in this patch. xen/arch/x86/hvm/hvm.c | 4 ++-- xen/arch/x86/hvm/svm/svm.c | 10 ++++++++-- xen/arch/x86/time.c | 9 ++++----- xen/include/asm-x86/hvm/hvm.h | 14 ++++++++++++++ 4 files changed, 28 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 3648a44..6d30d8b 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -314,7 +314,7 @@ void hvm_set_guest_tsc_fixed(struct vcpu *v, u64 guest_tsc, u64 at_tsc) else { tsc = at_tsc ?: rdtsc(); - if ( cpu_has_tsc_ratio ) + if ( hvm_tsc_scaling_supported ) tsc = hvm_funcs.scale_tsc(v, tsc); } @@ -346,7 +346,7 @@ u64 hvm_get_guest_tsc_fixed(struct vcpu *v, uint64_t at_tsc) else { tsc = at_tsc ?: rdtsc(); - if ( cpu_has_tsc_ratio ) + if ( hvm_tsc_scaling_supported ) tsc = hvm_funcs.scale_tsc(v, tsc); } diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 953e0b5..8b316a0 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1450,6 +1450,14 @@ const struct hvm_function_table * __init start_svm(void) if ( !cpu_has_svm_nrips ) clear_bit(SVM_FEATURE_DECODEASSISTS, &svm_feature_flags); + if ( cpu_has_tsc_ratio ) + { + svm_function_table.default_tsc_scaling_ratio = DEFAULT_TSC_RATIO; + svm_function_table.max_tsc_scaling_ratio = ~TSC_RATIO_RSVD_BITS; + svm_function_table.tsc_scaling_ratio_frac_bits = 32; + svm_function_table.scale_tsc = svm_scale_tsc; + } + #define P(p,s) if ( p ) { printk(" - %s\n", s); printed = 1; } P(cpu_has_svm_npt, "Nested Page Tables (NPT)"); P(cpu_has_svm_lbrv, "Last Branch Record (LBR) Virtualisation"); @@ -2269,8 +2277,6 @@ static struct hvm_function_table __initdata svm_function_table = { .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, .nhvm_intr_blocked = nsvm_intr_blocked, .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, - - .scale_tsc = svm_scale_tsc, }; void svm_vmexit_handler(struct cpu_user_regs *regs) diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index 988403a..a243bc3 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -37,7 +37,6 @@ #include #include #include /* for early_time_init */ -#include /* for cpu_has_tsc_ratio */ #include /* opt_clocksource: Force clocksource to one of: pit, hpet, acpi. */ @@ -815,7 +814,7 @@ static void __update_vcpu_system_time(struct vcpu *v, int force) } else { - if ( has_hvm_container_domain(d) && cpu_has_tsc_ratio ) + if ( has_hvm_container_domain(d) && hvm_tsc_scaling_supported ) { tsc_stamp = hvm_funcs.scale_tsc(v, t->local_tsc_stamp); _u.tsc_to_system_mul = d->arch.vtsc_to_ns.mul_frac; @@ -1758,7 +1757,7 @@ void tsc_get_info(struct domain *d, uint32_t *tsc_mode, uint32_t *incarnation) { bool_t enable_tsc_scaling = has_hvm_container_domain(d) && - cpu_has_tsc_ratio && !d->arch.vtsc; + hvm_tsc_scaling_supported && !d->arch.vtsc; *incarnation = d->arch.incarnation; *tsc_mode = d->arch.tsc_mode; @@ -1865,7 +1864,7 @@ void tsc_set_info(struct domain *d, */ if ( tsc_mode == TSC_MODE_DEFAULT && host_tsc_is_safe() && (has_hvm_container_domain(d) ? - d->arch.tsc_khz == cpu_khz || cpu_has_tsc_ratio : + d->arch.tsc_khz == cpu_khz || hvm_tsc_scaling_supported : incarnation == 0) ) { case TSC_MODE_NEVER_EMULATE: @@ -1879,7 +1878,7 @@ void tsc_set_info(struct domain *d, d->arch.vtsc = !boot_cpu_has(X86_FEATURE_RDTSCP) || !host_tsc_is_safe(); enable_tsc_scaling = has_hvm_container_domain(d) && - cpu_has_tsc_ratio && !d->arch.vtsc; + hvm_tsc_scaling_supported && !d->arch.vtsc; d->arch.tsc_khz = (enable_tsc_scaling && gtsc_khz) ? gtsc_khz : cpu_khz; set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000 ); d->arch.ns_to_vtsc = scale_reciprocal(d->arch.vtsc_to_ns); diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h index a87224b..79ea59e 100644 --- a/xen/include/asm-x86/hvm/hvm.h +++ b/xen/include/asm-x86/hvm/hvm.h @@ -100,6 +100,17 @@ struct hvm_function_table { unsigned int hap_capabilities; /* + * Parameters of hardware-assisted TSC scaling, which are valid only when + * the hardware feature is available. + */ + /* number of bits of the fractional part of TSC scaling ratio */ + uint8_t tsc_scaling_ratio_frac_bits; + /* default TSC scaling ratio (no scaling) */ + uint64_t default_tsc_scaling_ratio; + /* maximum-allowed TSC scaling ratio */ + uint64_t max_tsc_scaling_ratio; + + /* * Initialise/destroy HVM domain/vcpu resources */ int (*domain_initialise)(struct domain *d); @@ -213,6 +224,7 @@ struct hvm_function_table { bool_t (*altp2m_vcpu_emulate_ve)(struct vcpu *v); int (*altp2m_vcpu_emulate_vmfunc)(struct cpu_user_regs *regs); + /* Valid only when hardware-assisted TSC scaling is available */ uint64_t (*scale_tsc)(const struct vcpu *v, uint64_t tsc); }; @@ -249,6 +261,8 @@ void hvm_set_guest_tsc_fixed(struct vcpu *v, u64 guest_tsc, u64 at_tsc); u64 hvm_get_guest_tsc_fixed(struct vcpu *v, u64 at_tsc); #define hvm_get_guest_tsc(v) hvm_get_guest_tsc_fixed(v, 0) +#define hvm_tsc_scaling_supported (!!hvm_funcs.default_tsc_scaling_ratio) + int hvm_set_mode(struct vcpu *v, int mode); void hvm_init_guest_time(struct domain *d); void hvm_set_guest_time(struct vcpu *v, u64 guest_time);