From patchwork Sun Jan 17 21:58:56 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 8051041 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8DC29BEEED for ; Sun, 17 Jan 2016 22:04:36 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A91B420527 for ; Sun, 17 Jan 2016 22:04:31 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91369205DC for ; Sun, 17 Jan 2016 22:03:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aKvNA-0003SY-6G; Sun, 17 Jan 2016 22:00:32 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aKvN8-0003Ri-2L for xen-devel@lists.xen.org; Sun, 17 Jan 2016 22:00:30 +0000 Received: from [85.158.143.35] by server-1.bemta-4.messagelabs.com id BE/C6-09708-DFE0C965; Sun, 17 Jan 2016 22:00:29 +0000 X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-12.tower-21.messagelabs.com!1453068027!10688228!1 X-Originating-IP: [192.55.52.120] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 23055 invoked from network); 17 Jan 2016 22:00:28 -0000 Received: from mga04.intel.com (HELO mga04.intel.com) (192.55.52.120) by server-12.tower-21.messagelabs.com with SMTP; 17 Jan 2016 22:00:28 -0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP; 17 Jan 2016 14:00:27 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,309,1449561600"; d="scan'208";a="895353662" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.13.26]) by fmsmga002.fm.intel.com with ESMTP; 17 Jan 2016 14:00:25 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org, Jan Beulich , Boris Ostrovsky , Kevin Tian Date: Mon, 18 Jan 2016 05:58:56 +0800 Message-Id: <1453067939-9121-8-git-send-email-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.4.8 In-Reply-To: <1453067939-9121-1-git-send-email-haozhong.zhang@intel.com> References: <1453067939-9121-1-git-send-email-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Keir Fraser , Suravee Suthikulpanit , Andrew Cooper , Aravind Gopalakrishnan , Jun Nakajima Subject: [Xen-devel] [PATCH v4 07/10] x86/hvm: Replace architecture TSC scaling by a common function X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch implements a common function hvm_scale_tsc() to scale TSC by using TSC scaling information collected by architecture code. Signed-off-by: Haozhong Zhang Reviewed-by: Kevin Tian (except the mul64 part) Reviewed-by: Boris Ostrovsky Acked-by: Jan Beulich --- xen/arch/x86/hvm/hvm.c | 14 ++++++++++++-- xen/arch/x86/hvm/svm/svm.c | 8 -------- xen/arch/x86/time.c | 2 +- xen/include/asm-x86/hvm/hvm.h | 4 +--- 4 files changed, 14 insertions(+), 14 deletions(-) diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index 64a7760..8549dab 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -302,6 +302,16 @@ int hvm_set_guest_pat(struct vcpu *v, u64 guest_pat) return 1; } +u64 hvm_scale_tsc(const struct vcpu *v, u64 tsc) +{ + u64 ratio = v->arch.hvm_vcpu.tsc_scaling_ratio; + + if ( ratio == hvm_funcs.default_tsc_scaling_ratio ) + return tsc; + + return mul_u64_u64_shr(tsc, ratio, hvm_funcs.tsc_scaling_ratio_frac_bits); +} + /* * Get the ratio to scale host TSC frequency to gtsc_khz. zero will be * returned if TSC scaling is unavailable or ratio cannot be handled @@ -344,7 +354,7 @@ void hvm_set_guest_tsc_fixed(struct vcpu *v, u64 guest_tsc, u64 at_tsc) { tsc = at_tsc ?: rdtsc(); if ( hvm_tsc_scaling_supported ) - tsc = hvm_funcs.scale_tsc(v, tsc); + tsc = hvm_scale_tsc(v, tsc); } delta_tsc = guest_tsc - tsc; @@ -376,7 +386,7 @@ u64 hvm_get_guest_tsc_fixed(struct vcpu *v, uint64_t at_tsc) { tsc = at_tsc ?: rdtsc(); if ( hvm_tsc_scaling_supported ) - tsc = hvm_funcs.scale_tsc(v, tsc); + tsc = hvm_scale_tsc(v, tsc); } return tsc + v->arch.hvm_vcpu.cache_tsc_offset; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 17bce5c..a4ac38c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -804,13 +804,6 @@ static uint64_t scale_tsc(uint64_t host_tsc, uint64_t ratio) return scaled_host_tsc; } -static uint64_t svm_scale_tsc(const struct vcpu *v, uint64_t tsc) -{ - ASSERT(cpu_has_tsc_ratio && !v->domain->arch.vtsc); - - return scale_tsc(tsc, v->arch.hvm_vcpu.tsc_scaling_ratio); -} - static uint64_t svm_get_tsc_offset(uint64_t host_tsc, uint64_t guest_tsc, uint64_t ratio) { @@ -1457,7 +1450,6 @@ const struct hvm_function_table * __init start_svm(void) svm_function_table.default_tsc_scaling_ratio = DEFAULT_TSC_RATIO; svm_function_table.max_tsc_scaling_ratio = ~TSC_RATIO_RSVD_BITS; svm_function_table.tsc_scaling_ratio_frac_bits = 32; - svm_function_table.scale_tsc = svm_scale_tsc; } #define P(p,s) if ( p ) { printk(" - %s\n", s); printed = 1; } diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index 2ce6447..b4a6708 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -816,7 +816,7 @@ static void __update_vcpu_system_time(struct vcpu *v, int force) { if ( has_hvm_container_domain(d) && hvm_tsc_scaling_supported ) { - tsc_stamp = hvm_funcs.scale_tsc(v, t->local_tsc_stamp); + tsc_stamp = hvm_scale_tsc(v, t->local_tsc_stamp); _u.tsc_to_system_mul = d->arch.vtsc_to_ns.mul_frac; _u.tsc_shift = d->arch.vtsc_to_ns.shift; } diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h index f2d1419..5588b92 100644 --- a/xen/include/asm-x86/hvm/hvm.h +++ b/xen/include/asm-x86/hvm/hvm.h @@ -223,9 +223,6 @@ struct hvm_function_table { void (*altp2m_vcpu_update_vmfunc_ve)(struct vcpu *v); bool_t (*altp2m_vcpu_emulate_ve)(struct vcpu *v); int (*altp2m_vcpu_emulate_vmfunc)(struct cpu_user_regs *regs); - - /* Valid only when hardware-assisted TSC scaling is available */ - uint64_t (*scale_tsc)(const struct vcpu *v, uint64_t tsc); }; extern struct hvm_function_table hvm_funcs; @@ -263,6 +260,7 @@ u64 hvm_get_guest_tsc_fixed(struct vcpu *v, u64 at_tsc); #define hvm_tsc_scaling_supported (!!hvm_funcs.default_tsc_scaling_ratio) +u64 hvm_scale_tsc(const struct vcpu *v, u64 tsc); u64 hvm_get_tsc_scaling_ratio(u32 gtsc_khz); void hvm_setup_tsc_scaling(struct vcpu *v);