From patchwork Tue Feb 2 07:11:03 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shuai Ruan X-Patchwork-Id: 8187251 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DC100BEEE5 for ; Tue, 2 Feb 2016 07:16:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E697620253 for ; Tue, 2 Feb 2016 07:16:07 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 17AE52024D for ; Tue, 2 Feb 2016 07:16:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aQV9J-0006Dx-4o; Tue, 02 Feb 2016 07:13:17 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aQV9H-0006Dg-KM for xen-devel@lists.xen.org; Tue, 02 Feb 2016 07:13:15 +0000 Received: from [85.158.137.68] by server-11.bemta-3.messagelabs.com id 22/17-32641-A0750B65; Tue, 02 Feb 2016 07:13:14 +0000 X-Env-Sender: shuai.ruan@linux.intel.com X-Msg-Ref: server-15.tower-31.messagelabs.com!1454397192!19344613!2 X-Originating-IP: [134.134.136.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjQgPT4gMzkwOTcx\n X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 10055 invoked from network); 2 Feb 2016 07:13:13 -0000 Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by server-15.tower-31.messagelabs.com with SMTP; 2 Feb 2016 07:13:13 -0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 01 Feb 2016 23:13:13 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,384,1449561600"; d="scan'208";a="894419497" Received: from rs-vmm.bj.intel.com ([10.238.135.71]) by fmsmga001.fm.intel.com with ESMTP; 01 Feb 2016 23:13:12 -0800 From: Shuai Ruan To: xen-devel@lists.xen.org Date: Tue, 2 Feb 2016 15:11:03 +0800 Message-Id: <1454397064-29268-2-git-send-email-shuai.ruan@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454397064-29268-1-git-send-email-shuai.ruan@linux.intel.com> References: <1454397064-29268-1-git-send-email-shuai.ruan@linux.intel.com> Cc: andrew.cooper3@citrix.com, keir@xen.org, jbeulich@suse.com Subject: [Xen-devel] [PATCH 1/2] x86: add alternavive_io_2/3 to support alternative with 2/3 features. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Most of the code is porting from linux with some changes. alternative_io_2 replaces old instruction with new instructions based on two features. alternative_io_3 replaces old instruction with new instructions based on three features. Signed-off-by: Shuai Ruan --- xen/include/asm-x86/alternative.h | 65 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/xen/include/asm-x86/alternative.h b/xen/include/asm-x86/alternative.h index 7d11354..b018613 100644 --- a/xen/include/asm-x86/alternative.h +++ b/xen/include/asm-x86/alternative.h @@ -59,6 +59,39 @@ extern void alternative_instructions(void); ALTINSTR_REPLACEMENT(newinstr, feature, 1) \ ".popsection" +#define ALTERNATIVE_2(oldinstr, newinstr1, feature1, newinstr2, feature2) \ + OLDINSTR(oldinstr) \ + ".pushsection .altinstructions,\"a\"\n" \ + ALTINSTR_ENTRY(feature1, 1) \ + ALTINSTR_ENTRY(feature2, 2) \ + ".popsection\n" \ + ".pushsection .discard,\"aw\",@progbits\n" \ + DISCARD_ENTRY(1) \ + DISCARD_ENTRY(2) \ + ".popsection\n" \ + ".pushsection .altinstr_replacement, \"ax\"\n" \ + ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \ + ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ + ".popsection" + +#define ALTERNATIVE_3(oldinstr, newinstr1, feature1, newinstr2, feature2, \ + newinstr3, feature3) \ + OLDINSTR(oldinstr) \ + ".pushsection .altinstructions,\"a\"\n" \ + ALTINSTR_ENTRY(feature1, 1) \ + ALTINSTR_ENTRY(feature2, 2) \ + ALTINSTR_ENTRY(feature3, 3) \ + ".popsection\n" \ + ".pushsection .discard,\"aw\",@progbits\n" \ + DISCARD_ENTRY(1) \ + DISCARD_ENTRY(2) \ + DISCARD_ENTRY(3) \ + ".popsection\n" \ + ".pushsection .altinstr_replacement, \"ax\"\n" \ + ALTINSTR_REPLACEMENT(newinstr1, feature1, 1) \ + ALTINSTR_REPLACEMENT(newinstr2, feature2, 2) \ + ALTINSTR_REPLACEMENT(newinstr3, feature3, 3) \ + ".popsection" /* * Alternative instructions for different CPU types or capabilities. * @@ -93,6 +126,38 @@ extern void alternative_instructions(void); asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) \ : output : input) +/* + * This is similar to alternative_io. But it has two features and + * respective instructions. + * + * If CPU has feature2, newinstr2 is used. + * if CPU has feature1, newinstr1 is used. + * Otherwise, oldinstr is used. + */ + +#define alternative_io_2(oldinstr, newinstr1, feature1, newinstr2, \ + feature2, out_put, input...) \ + asm volatile(ALTERNATIVE_2(oldinstr, newinstr1, feature1, \ + newinstr2, feature2) \ + : output : input) + +/* + * This is similar to alternative_io. But it has three features and + * respective instructions. + * + * If CPU has feature3, newinstr3 is used. + * If CPU has feature2, newinstr2 is used. + * if CPU has feature1, newinstr1 is used. + * Otherwise, oldinstr is used. + */ + +#define alternative_io_3(oldinstr, newinstr1, feature1, newinstr2, \ + feature2, newinstr3, feature3, output, \ + input...) \ + asm volatile(ALTERNATIVE_3(oldinstr, newinstr1, feature1, \ + newinstr2, feature2, newinstr3, feature3) \ + : output : input) + /* Use this macro(s) if you need more than one output parameter. */ #define ASM_OUTPUT2(a...) a