From patchwork Fri Feb 5 13:41:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 8234441 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8938CBEEE5 for ; Fri, 5 Feb 2016 13:45:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 9E78620115 for ; Fri, 5 Feb 2016 13:45:06 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CABB62039D for ; Fri, 5 Feb 2016 13:45:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aRged-0006iK-Gb; Fri, 05 Feb 2016 13:42:31 +0000 Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aRgec-0006hX-2w for xen-devel@lists.xen.org; Fri, 05 Feb 2016 13:42:30 +0000 Received: from [85.158.143.35] by server-3.bemta-4.messagelabs.com id F2/AB-31122-4C6A4B65; Fri, 05 Feb 2016 13:42:28 +0000 X-Env-Sender: prvs=8364524b4=Andrew.Cooper3@citrix.com X-Msg-Ref: server-16.tower-21.messagelabs.com!1454679747!9808982!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 61684 invoked from network); 5 Feb 2016 13:42:28 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-16.tower-21.messagelabs.com with RC4-SHA encrypted SMTP; 5 Feb 2016 13:42:28 -0000 X-IronPort-AV: E=Sophos;i="5.22,400,1449532800"; d="scan'208";a="329916711" From: Andrew Cooper To: Xen-devel Date: Fri, 5 Feb 2016 13:41:54 +0000 Message-ID: <1454679743-18133-2-git-send-email-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> References: <1454679743-18133-1-git-send-email-andrew.cooper3@citrix.com> MIME-Version: 1.0 X-DLP: MIA2 Cc: Andrew Cooper , Jan Beulich Subject: [Xen-devel] [PATCH v2 01/30] xen/x86: Drop X86_FEATURE_3DNOW_ALT X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introducing an X86_FEATURE aliased value turns out to complicate automatic processing of the feature list. Drop X86_FEATURE_3DNOW_ALT and use X86_FEATURE_PBE, extending the comment accordingly. Signed-off-by: Andrew Cooper --- CC: Jan Beulich New in v2 --- xen/arch/x86/cpu/amd.c | 9 ++++++--- xen/include/asm-x86/cpufeature.h | 1 - 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index 8ec841b..1ac44e0 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -440,9 +440,12 @@ static void init_amd(struct cpuinfo_x86 *c) wrmsrl(MSR_K7_HWCR, value); } - /* Bit 31 in normal CPUID used for nonstandard 3DNow ID; - 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */ - __clear_bit(X86_FEATURE_3DNOW_ALT, c->x86_capability); + /* + * Some AMD CPUs duplicate the 3DNow bit in base and extended CPUID + * leaves. Unfortunately, this aliases PBE on Intel CPUs. Clobber the + * alias, leaving 3DNow in the extended leaf. + */ + __clear_bit(X86_FEATURE_PBE, c->x86_capability); if (c->x86 == 0xf && c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) { diff --git a/xen/include/asm-x86/cpufeature.h b/xen/include/asm-x86/cpufeature.h index 23f9fb2..6583039 100644 --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -45,7 +45,6 @@ #define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */ #define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */ #define X86_FEATURE_PBE (0*32+31) /* Pending Break Enable */ -#define X86_FEATURE_3DNOW_ALT (0*32+31) /* AMD nonstandard 3DNow (Aliases PBE) */ /* AMD-defined CPU features, CPUID level 0x80000001, word 1 */ /* Don't duplicate feature flags which are redundant with Intel! */