From patchwork Fri Feb 19 14:15:43 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luis Chamberlain X-Patchwork-Id: 8361671 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 5158AC0554 for ; Fri, 19 Feb 2016 14:18:35 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 25FA92049E for ; Fri, 19 Feb 2016 14:18:33 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3651F20461 for ; Fri, 19 Feb 2016 14:18:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aWlqo-0005t4-H7; Fri, 19 Feb 2016 14:16:06 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aWlqm-0005rj-6k for xen-devel@lists.xensource.com; Fri, 19 Feb 2016 14:16:04 +0000 Received: from [193.109.254.147] by server-11.bemta-14.messagelabs.com id D2/C3-28228-3A327C65; Fri, 19 Feb 2016 14:16:03 +0000 X-Env-Sender: mcgrof@kernel.org X-Msg-Ref: server-9.tower-27.messagelabs.com!1455891361!25073843!1 X-Originating-IP: [198.145.29.136] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 20306 invoked from network); 19 Feb 2016 14:16:02 -0000 Received: from mail.kernel.org (HELO mail.kernel.org) (198.145.29.136) by server-9.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 19 Feb 2016 14:16:02 -0000 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 905B920497; Fri, 19 Feb 2016 14:16:00 +0000 (UTC) Received: from garbanzo.do-not-panic.com (c-73-15-241-2.hsd1.ca.comcast.net [73.15.241.2]) (using TLSv1.2 with cipher AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 56432204D3; Fri, 19 Feb 2016 14:15:58 +0000 (UTC) From: "Luis R. Rodriguez" To: hpa@zytor.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de Date: Fri, 19 Feb 2016 06:15:43 -0800 Message-Id: <1455891343-10016-7-git-send-email-mcgrof@kernel.org> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1455891343-10016-1-git-send-email-mcgrof@kernel.org> References: <1455891343-10016-1-git-send-email-mcgrof@kernel.org> X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Cc: jgross@suse.com, rusty@rustcorp.com.au, x86@kernel.org, linux-kernel@vger.kernel.org, luto@amacapital.net, "Luis R. Rodriguez" , xen-devel@lists.xensource.com, david.vrabel@citrix.com, boris.ostrovsky@oracle.com, andriy.shevchenko@linux.intel.com, mcb30@ipxe.org Subject: [Xen-devel] [RFC v2 6/6] x86/init: use linker table for mid early setup X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Virus-Scanned: ClamAV using ClamSMTP Using the linker table removes the need for the #ifdef'ery and clutter on head32.c and head64.c, if this is linked in and the subarch matches it will run. Cc: Andy Shevchenko Signed-off-by: Luis R. Rodriguez --- arch/x86/include/asm/setup.h | 6 ------ arch/x86/kernel/head32.c | 7 ------- arch/x86/kernel/head64.c | 8 -------- arch/x86/platform/intel-mid/intel-mid.c | 4 +++- 4 files changed, 3 insertions(+), 22 deletions(-) diff --git a/arch/x86/include/asm/setup.h b/arch/x86/include/asm/setup.h index f1e111a9d558..1345c1de7f99 100644 --- a/arch/x86/include/asm/setup.h +++ b/arch/x86/include/asm/setup.h @@ -45,12 +45,6 @@ extern void reserve_standard_io_resources(void); extern void i386_reserve_resources(void); extern void setup_default_timer_irq(void); -#ifdef CONFIG_X86_INTEL_MID -extern void x86_intel_mid_early_setup(void); -#else -static inline void x86_intel_mid_early_setup(void) { } -#endif - #ifndef _SETUP #include diff --git a/arch/x86/kernel/head32.c b/arch/x86/kernel/head32.c index 9357feb09863..f28360c20496 100644 --- a/arch/x86/kernel/head32.c +++ b/arch/x86/kernel/head32.c @@ -37,13 +37,6 @@ asmlinkage __visible void __init i386_start_kernel(void) cr4_init_shadow(); sanitize_boot_params(&boot_params); - /* Call the subarch specific early setup function */ - switch (boot_params.hdr.hardware_subarch) { - case X86_SUBARCH_INTEL_MID: - x86_intel_mid_early_setup(); - break; - } - x86_init_fn_init_tables(); x86_init_fn_early_init(); diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index a823447139f5..c913b7eb5056 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -194,13 +194,5 @@ void __init x86_64_start_reservations(char *real_mode_data) x86_init_fn_init_tables(); x86_init_fn_early_init(); - switch (boot_params.hdr.hardware_subarch) { - case X86_SUBARCH_INTEL_MID: - x86_intel_mid_early_setup(); - break; - default: - break; - } - start_kernel(); } diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c index 90bb997ed0a2..6a20a134d4d8 100644 --- a/arch/x86/platform/intel-mid/intel-mid.c +++ b/arch/x86/platform/intel-mid/intel-mid.c @@ -167,7 +167,7 @@ static unsigned char intel_mid_get_nmi_reason(void) * Moorestown specific x86_init function overrides and early setup * calls. */ -void __init x86_intel_mid_early_setup(void) +static void __init x86_intel_mid_early_setup(void) { x86_init.resources.probe_roms = x86_init_noop; x86_init.resources.reserve_resources = x86_init_noop; @@ -199,6 +199,8 @@ void __init x86_intel_mid_early_setup(void) x86_init.mpparse.get_smp_config = x86_init_uint_noop; set_bit(MP_BUS_ISA, mp_bus_not_pci); } +x86_init_early(BIT(X86_SUBARCH_INTEL_MID), NULL, NULL, + x86_intel_mid_early_setup); /* * if user does not want to use per CPU apb timer, just give it a lower rating