From patchwork Tue Mar 29 13:44:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joao Martins X-Patchwork-Id: 8687271 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B812FC0553 for ; Tue, 29 Mar 2016 13:46:53 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC28320320 for ; Tue, 29 Mar 2016 13:46:52 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7A6D120306 for ; Tue, 29 Mar 2016 13:46:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aktwp-0007Tu-G2; Tue, 29 Mar 2016 13:44:43 +0000 Received: from mail6.bemta6.messagelabs.com ([85.158.143.247]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aktwn-0007SD-OF for xen-devel@lists.xen.org; Tue, 29 Mar 2016 13:44:41 +0000 Received: from [85.158.143.35] by server-2.bemta-6.messagelabs.com id 4E/6C-09532-9C68AF65; Tue, 29 Mar 2016 13:44:41 +0000 X-Env-Sender: joao.m.martins@oracle.com X-Msg-Ref: server-6.tower-21.messagelabs.com!1459259079!6373717!1 X-Originating-IP: [141.146.126.69] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTQxLjE0Ni4xMjYuNjkgPT4gMjc3MjE4\n X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15114 invoked from network); 29 Mar 2016 13:44:40 -0000 Received: from aserp1040.oracle.com (HELO aserp1040.oracle.com) (141.146.126.69) by server-6.tower-21.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 29 Mar 2016 13:44:40 -0000 Received: from aserv0021.oracle.com (aserv0021.oracle.com [141.146.126.233]) by aserp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id u2TDiSvc003634 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 29 Mar 2016 13:44:29 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by aserv0021.oracle.com (8.13.8/8.13.8) with ESMTP id u2TDiSPv013586 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Tue, 29 Mar 2016 13:44:28 GMT Received: from abhmp0016.oracle.com (abhmp0016.oracle.com [141.146.116.22]) by aserv0122.oracle.com (8.13.8/8.13.8) with ESMTP id u2TDiQmv015936; Tue, 29 Mar 2016 13:44:27 GMT Received: from localhost.localdomain (/193.126.154.29) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Tue, 29 Mar 2016 06:44:26 -0700 From: Joao Martins To: xen-devel@lists.xen.org Date: Tue, 29 Mar 2016 14:44:08 +0100 Message-Id: <1459259051-4943-4-git-send-email-joao.m.martins@oracle.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1459259051-4943-1-git-send-email-joao.m.martins@oracle.com> References: <1459259051-4943-1-git-send-email-joao.m.martins@oracle.com> X-Source-IP: aserv0021.oracle.com [141.146.126.233] Cc: Andrew Cooper , Joao Martins , Keir Fraser , Jan Beulich Subject: [Xen-devel] [PATCH v2 3/6] x86/time: implement tsc as clocksource X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Introduce support for using TSC as platform time which is the highest resolution time and most performant to get (~20 nsecs). Though there are also several problems associated with its usage, and there isn't a complete (and architecturally defined) guarantee that all machines will provide reliable and monotonic TSC across all CPUs, on different sockets and different P/C states. I believe Intel to be the only that can guarantee that. For this reason it's only set when adminstrator changes "clocksource" boot option to "tsc". Initializing TSC clocksource requires all CPUs to have the tsc reliability checks performed. init_xen_time is called before all CPUs are up, and so we start with HPET at boot time, and switch later to TSC. The switch then happens on verify_tsc_reliability initcall that is invoked when all CPUs are up. When attempting to initializing TSC we also check for time warps and appropriate CPU features i.e. TSC_RELIABLE, CONSTANT_TSC and NONSTOP_TSC. And in case none of these conditions are met, we keep the clocksource that was previously initialized on init_xen_time. It is also worth noting that with clocksource=tsc there isn't any need to synchronise with another clocksource, and I could verify that great portion the time skew was eliminated and seeing much less time warps happening. With HPET I used to observe ~500 warps in the period of 1h of around 27 us, and with TSC down to 50 warps in the same period having each warp < 100 ns. The warps still exist though but are only related to cross CPU calibration (being how much it takes to rendezvous with master), in which a later patch in this series aims to solve. Signed-off-by: Joao Martins --- Cc: Keir Fraser Cc: Jan Beulich Cc: Andrew Cooper Changes since v1: - s/printk/printk(XENLOG_INFO - Remove extra space on inner brackets - Add missing space around brackets - Defer clocksource TSC initialization when all CPUs are up. Changes since RFC: - Spelling fixes in the commit message. - Remove unused clocksource_is_tsc variable and introduce it instead on the patch that uses it. - Move plt_tsc from second to last in the available clocksources. --- xen/arch/x86/time.c | 97 +++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 95 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c index ed4ed24..2602dda 100644 --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -432,6 +432,63 @@ uint64_t ns_to_acpi_pm_tick(uint64_t ns) } /************************************************************ + * PLATFORM TIMER 4: TSC + */ +static u64 tsc_freq; +static unsigned long tsc_max_warp; +static void tsc_check_reliability(void); + +static int __init init_tsctimer(struct platform_timesource *pts) +{ + bool_t tsc_reliable = 0; + + tsc_check_reliability(); + + if ( tsc_max_warp > 0 ) + { + tsc_reliable = 0; + printk(XENLOG_INFO "TSC: didn't passed warp test\n"); + } + else if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) || + (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && + boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) ) + { + tsc_reliable = 1; + } + else if ( boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ) + { + tsc_reliable = (max_cstate <= 2); + + if ( tsc_reliable ) + printk(XENLOG_INFO "TSC: no deep Cstates, deemed reliable\n"); + else + printk(XENLOG_INFO "TSC: deep Cstates possible, so not reliable\n"); + } + + pts->frequency = tsc_freq; + return tsc_reliable; +} + +static u64 read_tsc(void) +{ + return rdtsc(); +} + +static void resume_tsctimer(struct platform_timesource *pts) +{ +} + +static struct platform_timesource __initdata plt_tsc = +{ + .id = "tsc", + .name = "TSC", + .read_counter = read_tsc, + .counter_bits = 64, + .init = init_tsctimer, + .resume = resume_tsctimer, +}; + +/************************************************************ * GENERIC PLATFORM TIMER INFRASTRUCTURE */ @@ -533,6 +590,21 @@ static void resume_platform_timer(void) plt_stamp = plt_src.read_counter(); } +static void __init reset_platform_timer(void) +{ + /* Deactivate any timers running */ + kill_timer(&plt_overflow_timer); + kill_timer(&calibration_timer); + + /* Reset counters and stamps */ + spin_lock_irq(&platform_timer_lock); + plt_stamp = 0; + plt_stamp64 = 0; + platform_timer_stamp = 0; + stime_platform_stamp = 0; + spin_unlock_irq(&platform_timer_lock); +} + static int __init try_platform_timer(struct platform_timesource *pts) { int rc = -1; @@ -541,6 +613,10 @@ static int __init try_platform_timer(struct platform_timesource *pts) if ( rc <= 0 ) return rc; + /* We have a platform timesource already so reset it */ + if ( plt_src.counter_bits != 0 ) + reset_platform_timer(); + plt_mask = (u64)~0ull >> (64 - pts->counter_bits); set_time_scale(&plt_scale, pts->frequency); @@ -566,7 +642,9 @@ static void __init init_platform_timer(void) struct platform_timesource *pts = NULL; int i, rc = -1; - if ( opt_clocksource[0] != '\0' ) + /* clocksource=tsc is initialized later when all CPUS are up */ + if ( (opt_clocksource[0] != '\0') && + (strcmp(opt_clocksource, "tsc") != 0) ) { for ( i = 0; i < ARRAY_SIZE(plt_timers); i++ ) { @@ -1192,7 +1270,7 @@ static void check_tsc_warp(unsigned long tsc_khz, unsigned long *max_warp) } } -static unsigned long tsc_max_warp, tsc_check_count; +static unsigned long tsc_check_count; static cpumask_t tsc_check_cpumask; static void tsc_check_slave(void *unused) @@ -1437,6 +1515,20 @@ static int __init verify_tsc_reliability(void) } } + if ( !strcmp(opt_clocksource, "tsc") ) + { + if ( try_platform_timer(&plt_tsc) > 0 ) + { + printk(XENLOG_INFO "Switched to Platform timer %s TSC\n", + freq_string(plt_src.frequency)); + + init_percpu_time(); + + init_timer(&calibration_timer, time_calibration, NULL, 0); + set_timer(&calibration_timer, NOW() + EPOCH); + } + } + return 0; } __initcall(verify_tsc_reliability); @@ -1476,6 +1568,7 @@ void __init early_time_init(void) struct cpu_time *t = &this_cpu(cpu_time); u64 tmp = init_pit_and_calibrate_tsc(); + tsc_freq = tmp; set_time_scale(&t->tsc_scale, tmp); t->local_tsc_stamp = boot_tsc_stamp;