From patchwork Tue Oct 25 03:40:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9393901 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id EA84860762 for ; Tue, 25 Oct 2016 02:36:20 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DBE2A28B39 for ; Tue, 25 Oct 2016 02:36:20 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF21B2927D; Tue, 25 Oct 2016 02:36:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 834FD28B39 for ; Tue, 25 Oct 2016 02:36:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1byrYs-0004Nb-UN; Tue, 25 Oct 2016 02:33:58 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1byrYr-0004MO-SZ for xen-devel@lists.xenproject.org; Tue, 25 Oct 2016 02:33:58 +0000 Received: from [193.109.254.147] by server-10.bemta-6.messagelabs.com id BC/29-21986-594CE085; Tue, 25 Oct 2016 02:33:57 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRWlGSWpSXmKPExsVywNykWHfKEb4 Ig7a/Mhbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8aD0zYFcwsr5iz6wN7AuCuoi5GTQ0igQmLn /YtMILaEAK/EkWUzWCHsAIn2/x+BbC6gmgZGiZeb57GAJNgE1CUef+0BaxARUJK4t2oyE0gRs 8B+RolfLx+DFQkLOEosWbOeEcRmEVCV+NN1AKyBV8BdYnVvP9Q2OYmTxyaDbeMU8JC4s/c4O8 RF7hJ9DU2MExh5FzAyrGLUKE4tKkst0jU010sqykzPKMlNzMzRNTQw08tNLS5OTE/NSUwq1kv Oz93ECAwHBiDYwXh7Y8AhRkkOJiVR3pmb+CKE+JLyUyozEosz4otKc1KLDzHKcHAoSfCuPwyU EyxKTU+tSMvMAQYmTFqCg0dJhPcJSJq3uCAxtzgzHSJ1ilGXY8uCG2uZhFjy8vNSpcR5F4EUC YAUZZTmwY2ARcklRlkpYV5GoKOEeApSi3IzS1DlXzGKczAqCfO+AJnCk5lXArfpFdARTEBHCM bzgBxRkoiQkmpg5GVPFAt8+IXj7xSXiU2BU4O4M6NKulNZ9kcpruJNzi+/7WK+s8fr3LTq95Z PrjwMyk13CWBWPl0jypUTl5Tw+PL8+CfquZXSD5kbp+YuE3Pce+LzD4lVV05qrPMNXi0r1lF9 t7kybn7I9ZUbmUy1f2Yzri65NG3+icMfWXu3FrqcW7rS4aCzEktxRqKhFnNRcSIAXceMTo0CA AA= X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-14.tower-27.messagelabs.com!1477362814!54875270!7 X-Originating-IP: [192.55.52.115] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.0.13; banners=-,-,- X-VirusChecked: Checked Received: (qmail 49999 invoked from network); 25 Oct 2016 02:33:55 -0000 Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by server-14.tower-27.messagelabs.com with DHE-RSA-CAMELLIA256-SHA encrypted SMTP; 25 Oct 2016 02:33:55 -0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 24 Oct 2016 19:33:56 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.31,544,1473145200"; d="scan'208"; a="1049570142" Received: from vmmmba-s2600wft.bj.intel.com ([10.240.193.60]) by orsmga001.jf.intel.com with ESMTP; 24 Oct 2016 19:33:53 -0700 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Tue, 25 Oct 2016 11:40:54 +0800 Message-Id: <1477366863-5246-7-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477366863-5246-1-git-send-email-yi.y.sun@linux.intel.com> References: <1477366863-5246-1-git-send-email-yi.y.sun@linux.intel.com> Cc: wei.liu2@citrix.com, he.chen@linux.intel.com, andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com, Yi Sun , jbeulich@suse.com, chao.p.peng@linux.intel.com Subject: [Xen-devel] [PATCH v3 06/15] x86: refactor psr: Create feature list. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch creates a feature list to manage features enabled on socket. A feature list entry contains the feature's info, including which feature it is, the feature HW info and the COS registers values. So far, only is L3 CAT/CDP added into list. So, the operations are L3 CAT/CDP specific. The universal operations will be abstracted and implemented in following patches. Signed-off-by: Yi Sun --- xen/arch/x86/psr.c | 192 +++++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 142 insertions(+), 50 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index aa902d2..38a64f0 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #define PSR_CMT (1<<0) @@ -26,8 +27,10 @@ /* Per spec, the maximum COS register number is 128. */ #define MAX_COS_REG_NUM 128 -#define PSR_SOCKET_L3_CAT 0 -#define PSR_SOCKET_L3_CDP 1 +enum psr_feat_type { + PSR_SOCKET_L3_CAT = 0, + PSR_SOCKET_L3_CDP, +}; /* CAT/CDP HW info data structure. */ struct psr_cat_hw_info { @@ -35,16 +38,25 @@ struct psr_cat_hw_info { unsigned int cos_max; }; -struct psr_cat_socket_info { - /* bit 1~0: [01]->L3 CAT-only, [10]->L3 CDP */ - unsigned int feat_mask; - struct psr_cat_hw_info l3_info; +struct feat_node { + /* Which feature it is. */ + enum psr_feat_type feature; + /* Feature HW info. */ + struct psr_cat_hw_info info; /* * Store the values of COS registers: * CAT uses 1 entry for one COS ID; * CDP uses 2 entries for one COS ID and DATA is the first one. */ uint64_t cos_reg_val[MAX_COS_REG_NUM]; + struct list_head list; +}; + +struct psr_cat_socket_info { + /* bit 1~0: [01]->L3 CAT-only, [10]->L3 CDP */ + unsigned int feat_mask; + unsigned int nr_feat; + struct list_head feat_list; /* * Every entry of cos_ref is the reference count of a COS register. * One entry of cos_ref corresponds to one COS ID. @@ -56,18 +68,18 @@ struct psr_cat_socket_info { /* * get_data - get DATA COS register value from input COS ID. - * @info: the struct psr_cat_socket_info pointer. + * @feat: the feature list entry. * @cos: the COS ID. */ -#define get_cdp_data(info, cos) \ - info->cos_reg_val[cos * 2] +#define get_cdp_data(feat, cos) \ + feat->cos_reg_val[cos * 2] /* * get_cdp_code - get CODE COS register value from input COS ID. - * @info: the struct psr_cat_socket_info pointer. + * @feat: the feature list entry. * @cos: the COS ID. */ -#define get_cdp_code(info, cos) \ - info->cos_reg_val[cos * 2 + 1] +#define get_cdp_code(feat, cos) \ + feat->cos_reg_val[cos * 2 + 1] struct psr_assoc { uint64_t val; @@ -84,6 +96,43 @@ static unsigned int __read_mostly opt_cos_max = MAX_COS_REG_NUM - 1; static uint64_t rmid_mask; static DEFINE_PER_CPU(struct psr_assoc, psr_assoc); +/* Feature list entry of feature L3 CAT/CDP. */ +static struct feat_node *feat_l3; + +static struct feat_node *get_feat_l3(struct psr_cat_socket_info *info) +{ + struct feat_node *feat_tmp; + + list_for_each_entry(feat_tmp, &info->feat_list, list) + if ( feat_tmp->feature == PSR_SOCKET_L3_CAT || + feat_tmp->feature == PSR_SOCKET_L3_CDP ) + return feat_tmp; + + return NULL; +} + +static void free_feature(struct psr_cat_socket_info *info) +{ + struct feat_node *feat_tmp; + + if ( !info ) + return; + + list_for_each_entry(feat_tmp, &info->feat_list, list) + { + clear_bit(feat_tmp->feature, &info->feat_mask); + list_del(&feat_tmp->list); + xfree(feat_tmp); + } + + /* Free feature which are not added into feat_list. */ + if ( feat_l3 ) + { + xfree(feat_l3); + feat_l3 = NULL; + } +} + static unsigned int get_socket_cpu(unsigned int socket) { if ( likely(socket < nr_sockets) ) @@ -240,10 +289,16 @@ static inline void psr_assoc_init(void) if ( cat_socket_info ) { unsigned int socket = cpu_to_socket(smp_processor_id()); + struct psr_cat_socket_info *info = cat_socket_info + socket; + struct feat_node *feat_tmp; + + feat_tmp = get_feat_l3(info); + if ( !feat_tmp ) + return; - if ( cat_socket_info[socket].feat_mask ) + if ( info->feat_mask ) psra->cos_mask = ((1ull << get_count_order( - cat_socket_info[socket].l3_info.cos_max)) - 1) << 32; + feat_tmp->info.cos_max)) - 1) << 32; } if ( psr_cmt_enabled() || psra->cos_mask ) @@ -303,12 +358,17 @@ int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len, uint32_t *cos_max, uint32_t *flags) { struct psr_cat_socket_info *info = get_cat_socket_info(socket); + struct feat_node *feat_tmp; if ( IS_ERR(info) ) return PTR_ERR(info); - *cbm_len = info->l3_info.cbm_len; - *cos_max = info->l3_info.cos_max; + feat_tmp = get_feat_l3(info); + if ( !feat_tmp ) + return -ENOENT; + + *cbm_len = feat_tmp->info.cbm_len; + *cos_max = feat_tmp->info.cos_max; *flags = 0; if ( cdp_is_enabled(socket) ) @@ -323,30 +383,35 @@ int psr_get_l3_cbm(struct domain *d, unsigned int socket, struct psr_cat_socket_info *info = get_cat_socket_info(socket); bool_t cdp_enabled = cdp_is_enabled(socket); unsigned int cos = d->arch.psr_cos_ids[socket]; + struct feat_node *feat_tmp; if ( IS_ERR(info) ) return PTR_ERR(info); + feat_tmp = get_feat_l3(info); + if ( !feat_tmp ) + return -ENOENT; + switch ( type ) { case PSR_CBM_TYPE_L3: if ( cdp_enabled ) return -EXDEV; - *cbm = info->cos_reg_val[cos]; + *cbm = feat_tmp->cos_reg_val[cos]; break; case PSR_CBM_TYPE_L3_CODE: if ( !cdp_enabled ) - *cbm = info->cos_reg_val[cos]; + *cbm = feat_tmp->cos_reg_val[cos]; else - *cbm = get_cdp_code(info, cos); + *cbm = get_cdp_code(feat_tmp, cos); break; case PSR_CBM_TYPE_L3_DATA: if ( !cdp_enabled ) - *cbm = info->cos_reg_val[cos]; + *cbm = feat_tmp->cos_reg_val[cos]; else - *cbm = get_cdp_data(info, cos); + *cbm = get_cdp_data(feat_tmp, cos); break; default: @@ -425,7 +490,7 @@ static int write_l3_cbm(unsigned int socket, unsigned int cos, return 0; } -static int find_cos(struct psr_cat_socket_info *info, unsigned int *ref, +static int find_cos(struct feat_node *feat, unsigned int *ref, unsigned int cos_max, uint64_t cbm_code, uint64_t cbm_data, bool_t cdp_enabled) { @@ -434,9 +499,9 @@ static int find_cos(struct psr_cat_socket_info *info, unsigned int *ref, for ( cos = 0; cos <= cos_max; cos++ ) { if ( (ref[cos] || cos == 0) && - ((!cdp_enabled && info->cos_reg_val[cos] == cbm_code) || - (cdp_enabled && get_cdp_code(info, cos) == cbm_code && - get_cdp_data(info, cos) == cbm_data)) ) + ((!cdp_enabled && feat->cos_reg_val[cos] == cbm_code) || + (cdp_enabled && get_cdp_code(feat, cos) == cbm_code && + get_cdp_data(feat, cos) == cbm_data)) ) return cos; } @@ -469,18 +534,23 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, bool_t cdp_enabled = cdp_is_enabled(socket); struct psr_cat_socket_info *info = get_cat_socket_info(socket); unsigned int *ref; + struct feat_node *feat_tmp; if ( IS_ERR(info) ) return PTR_ERR(info); - if ( !psr_check_cbm(info->l3_info.cbm_len, cbm) ) + feat_tmp = get_feat_l3(info); + if ( !feat_tmp ) + return -ENOENT; + + if ( !psr_check_cbm(feat_tmp->info.cbm_len, cbm) ) return -EINVAL; if ( !cdp_enabled && (type == PSR_CBM_TYPE_L3_CODE || type == PSR_CBM_TYPE_L3_DATA) ) return -ENXIO; - cos_max = info->l3_info.cos_max; + cos_max = feat_tmp->info.cos_max; old_cos = d->arch.psr_cos_ids[socket]; ref = info->cos_ref; @@ -493,11 +563,11 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, case PSR_CBM_TYPE_L3_CODE: cbm_code = cbm; - cbm_data = get_cdp_data(info, old_cos); + cbm_data = get_cdp_data(feat_tmp, old_cos); break; case PSR_CBM_TYPE_L3_DATA: - cbm_code = get_cdp_code(info, old_cos); + cbm_code = get_cdp_code(feat_tmp, old_cos); cbm_data = cbm; break; @@ -507,7 +577,7 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, } spin_lock(&info->ref_lock); - cos = find_cos(info, ref, cos_max, cbm_code, cbm_data, cdp_enabled); + cos = find_cos(feat_tmp, ref, cos_max, cbm_code, cbm_data, cdp_enabled); if ( cos >= 0 ) { if ( cos == old_cos ) @@ -527,9 +597,9 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, /* We try to avoid writing MSR. */ if ( (cdp_enabled && - (get_cdp_code(info, cos) != cbm_code || - get_cdp_data(info, cos) != cbm_data)) || - (!cdp_enabled && info->cos_reg_val[cos] != cbm_code) ) + (get_cdp_code(feat_tmp, cos) != cbm_code || + get_cdp_data(feat_tmp, cos) != cbm_data)) || + (!cdp_enabled && feat_tmp->cos_reg_val[cos] != cbm_code) ) { ret = write_l3_cbm(socket, cos, cbm_code, cbm_data, cdp_enabled); if ( ret ) @@ -537,8 +607,8 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, spin_unlock(&info->ref_lock); return ret; } - get_cdp_code(info, cos) = cbm_code; - get_cdp_data(info, cos) = cbm_data; + get_cdp_code(feat_tmp, cos) = cbm_code; + get_cdp_data(feat_tmp, cos) = cbm_data; } } @@ -599,7 +669,10 @@ static int cat_cpu_prepare(unsigned int cpu) if ( !cat_socket_info ) return 0; - /* Keep this function for future usage. */ + /* Malloc memory for the global feature head here. */ + if ( feat_l3 == NULL && + (feat_l3 = xzalloc(struct feat_node)) == NULL ) + return -ENOMEM; return 0; } @@ -612,6 +685,7 @@ static void cat_cpu_init(void) unsigned int cpu = smp_processor_id(); uint64_t val; const struct cpuinfo_x86 *c = cpu_data + cpu; + struct feat_node *feat_tmp; if ( !cpu_has(c, X86_FEATURE_PQE) || c->cpuid_level < PSR_CPUID_LEVEL_CAT ) return; @@ -624,12 +698,15 @@ static void cat_cpu_init(void) cpuid_count(PSR_CPUID_LEVEL_CAT, 0, &eax, &ebx, &ecx, &edx); if ( ebx & PSR_RESOURCE_TYPE_L3 ) { + feat_tmp = feat_l3; + feat_l3 = NULL; + cpuid_count(PSR_CPUID_LEVEL_CAT, 1, &eax, &ebx, &ecx, &edx); - info->l3_info.cbm_len = (eax & 0x1f) + 1; - info->l3_info.cos_max = min(opt_cos_max, edx & 0xffff); + feat_tmp->info.cbm_len = (eax & 0x1f) + 1; + feat_tmp->info.cos_max = min(opt_cos_max, edx & 0xffff); /* cos=0 is reserved as default cbm(all ones). */ - info->cos_reg_val[0] = (1ull << info->l3_info.cbm_len) - 1; + feat_tmp->cos_reg_val[0] = (1ull << feat_tmp->info.cbm_len) - 1; spin_lock_init(&info->ref_lock); @@ -637,26 +714,31 @@ static void cat_cpu_init(void) !test_bit(PSR_SOCKET_L3_CDP, &info->feat_mask) ) { /* CODE */ - get_cdp_code(info, 0) = (1ull << info->l3_info.cbm_len) - 1; + get_cdp_code(feat_tmp, 0) = (1ull << feat_tmp->info.cbm_len) - 1; /* DATA */ - get_cdp_data(info, 0) = (1ull << info->l3_info.cbm_len) - 1; + get_cdp_data(feat_tmp, 0) = (1ull << feat_tmp->info.cbm_len) - 1; /* We only write mask1 since mask0 is always all ones by default. */ - wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << info->l3_info.cbm_len) - 1); + wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << feat_tmp->info.cbm_len) - 1); rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << PSR_L3_QOS_CDP_ENABLE_BIT)); /* Cut half of cos_max when CDP is enabled. */ - info->l3_info.cos_max >>= 1; + feat_tmp->info.cos_max >>= 1; __set_bit(PSR_SOCKET_L3_CDP, &info->feat_mask); - } - else + } else { + feat_tmp->feature = PSR_SOCKET_L3_CAT; __set_bit(PSR_SOCKET_L3_CAT, &info->feat_mask); + } + + info->nr_feat++; + /* Add this feature into list. */ + list_add_tail(&feat_tmp->list, &info->feat_list); printk(XENLOG_INFO "CAT: enabled on socket %u, cos_max:%u, cbm_len:%u, CDP:%s\n", - socket, info->l3_info.cos_max, info->l3_info.cbm_len, + socket, feat_tmp->info.cos_max, feat_tmp->info.cbm_len, cdp_is_enabled(socket) ? "on" : "off"); } } @@ -669,21 +751,25 @@ static void cat_cpu_fini(unsigned int cpu) { struct psr_cat_socket_info *info = cat_socket_info + socket; - if ( cdp_is_enabled(socket) ) - clear_bit(PSR_SOCKET_L3_CDP, &info->feat_mask); - else - clear_bit(PSR_SOCKET_L3_CAT, &info->feat_mask); + free_feature(info); } } static void __init psr_cat_free(void) { + unsigned int i; + + for ( i = 0; i < nr_sockets; i++ ) + free_feature(&cat_socket_info[i]); + xfree(cat_socket_info); cat_socket_info = NULL; } static void __init init_psr_cat(void) { + unsigned int i; + if ( opt_cos_max < 1 ) { printk(XENLOG_INFO "CAT: disabled, cos_max is too small\n"); @@ -693,7 +779,13 @@ static void __init init_psr_cat(void) cat_socket_info = xzalloc_array(struct psr_cat_socket_info, nr_sockets); if ( !cat_socket_info ) + { printk(XENLOG_INFO "Fail to alloc socket_info!\n"); + return; + } + + for ( i = 0; i < nr_sockets; i++ ) + INIT_LIST_HEAD(&cat_socket_info[i].feat_list); } static int psr_cpu_prepare(unsigned int cpu)