From patchwork Fri Dec 9 03:17:52 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luwei Kang X-Patchwork-Id: 9467485 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 63493607D4 for ; Fri, 9 Dec 2016 03:23:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4269028635 for ; Fri, 9 Dec 2016 03:23:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 35A6D28654; Fri, 9 Dec 2016 03:23:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id BB61928655 for ; Fri, 9 Dec 2016 03:23:10 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cFBiT-0002JW-19; Fri, 09 Dec 2016 03:19:21 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cFBiR-0002JQ-Ij for xen-devel@lists.xen.org; Fri, 09 Dec 2016 03:19:19 +0000 Received: from [85.158.143.35] by server-3.bemta-6.messagelabs.com id 6B/27-08948-6B22A485; Fri, 09 Dec 2016 03:19:18 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrMLMWRWlGSWpSXmKPExsVywNykWHebkle EwfazghZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8aqHxeYC5q4Kr7NOMrawHiYvYuRk0NIoELi fNs8MFtCgFfiyLIZrF2MHEC2n8SKN/kQJVUSuy5cACthE1CX2Pp+IyuILSIgLXHt82XGLkYuD maBVkaJS50NTCAJYYFgiZ7mz4wgNouAqsTKVRNZQGbyCjhLHG5Rg1glJ3HzXCfzBEbuBYwMqx jVi1OLylKLdE31kooy0zNKchMzc3QNDcz0clOLixPTU3MSk4r1kvNzNzECPcsABDsYp1/2P8Q oycGkJMpbzOQVIcSXlJ9SmZFYnBFfVJqTWnyIUYaDQ0mC958iUE6wKDU9tSItMwcYYjBpCQ4e JRHe9yBp3uKCxNzizHSI1ClGRSlx3t0gCQGQREZpHlwbLKwvMcpKCfMyAh0ixFOQWpSbWYIq/ 4pRnINRSZj3PMgUnsy8Erjpr4AWMwEtnnfDHWRxSSJCSqqB8eDD+rtCiSXrr7iEzpeuNrb9kf 0xI1JTddU/Y50Y3Qv+89taJjuu0tsU2r/ZVkpyW6dW3XVxMZuSSIvnFr8Sz2T+/3nIRiItOPi 8sZjXnq8Giqc2fAjg+TJv5pLzG0oPFEZ2+yxcLbOpue6lwIfZIu7rtOwj+vLVBRY9nHYk4s62 xX2nakLklViKMxINtZiLihMBi7sMzmYCAAA= X-Env-Sender: luwei.kang@intel.com X-Msg-Ref: server-16.tower-21.messagelabs.com!1481253555!42891027!1 X-Originating-IP: [192.55.52.115] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 7416 invoked from network); 9 Dec 2016 03:19:17 -0000 Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by server-16.tower-21.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 9 Dec 2016 03:19:17 -0000 Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP; 08 Dec 2016 19:19:15 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,322,1477983600"; d="scan'208";a="40459427" Received: from vmm-dell.bj.intel.com ([10.238.154.151]) by orsmga005.jf.intel.com with ESMTP; 08 Dec 2016 19:19:13 -0800 From: Luwei Kang To: xen-devel@lists.xen.org Date: Fri, 9 Dec 2016 11:17:52 +0800 Message-Id: <1481253472-9209-1-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 Cc: andrew.cooper3@citrix.com, kevin.tian@intel.com, Luwei Kang , jun.nakajima@intel.com, jbeulich@suse.com Subject: [Xen-devel] [PATCH] X86/VPMU: mask off uncore overflow bit on xeon phi knights landing X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP IA32_PERF_GLOBAL_STATUS.OvfUncore (MSR 38EH, bit[61]) is always 0 and writing 1 to IA32_PERF_GLOBAL_OVF_CTRL.ClrOvfUncore (MSR 390H, bit[61]) signals #GP. Reference "Intel Xeon Phi Procssor x200 Product Family", document number 334646-008. Signed-off-by: Luwei Kang --- xen/arch/x86/cpu/vpmu_intel.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c index e8049ed..0be78ff 100644 --- a/xen/arch/x86/cpu/vpmu_intel.c +++ b/xen/arch/x86/cpu/vpmu_intel.c @@ -1058,11 +1058,17 @@ int __init core2_vpmu_init(void) (((1ULL << fixed_pmc_cnt) - 1) << 32) | ((1ULL << arch_pmc_cnt) - 1)); if ( version > 2 ) + { /* * Even though we don't support Uncore counters guests should be * able to clear all available overflows. */ global_ovf_ctrl_mask &= ~(1ULL << 61); + /* Knight Landing doesn't support overflow bit on uncore counters */ + if ( current_cpu_data.x86_model == 0x57 ) + global_ovf_ctrl_mask |= (1ULL << 61); + + } regs_sz = (sizeof(struct xen_pmu_intel_ctxt) - regs_off) + sizeof(uint64_t) * fixed_pmc_cnt +