From patchwork Wed Dec 14 04:07:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9474039 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2568260823 for ; Wed, 14 Dec 2016 11:12:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C3A32871B for ; Wed, 14 Dec 2016 11:12:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1063B2871F; Wed, 14 Dec 2016 11:12:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A1CC02871B for ; Wed, 14 Dec 2016 11:12:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cH7Rv-0005gD-Fx; Wed, 14 Dec 2016 11:10:15 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cH7Ru-0005fK-Rz for xen-devel@lists.xenproject.org; Wed, 14 Dec 2016 11:10:14 +0000 Received: from [85.158.143.35] by server-5.bemta-6.messagelabs.com id 8C/EE-11476-69821585; Wed, 14 Dec 2016 11:10:14 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJLMWRWlGSWpSXmKPExsXS1tYhoTtVIzD CYNYBZYvvWyYzOTB6HP5whSWAMYo1My8pvyKBNeP+zcWMBZPUK15MuMXcwPhEpouRk0NIoEJi w/4fzCC2hACvxJFlM1ghbD+JrVvfsXcxcgHVNDBKvHs3gQUkwSagLvH4aw8TiC0ioCRxb9VkJ pAiZoFuJomVD7eCFQkLhEncfbYJzGYRUJWYtHI6YxcjBwevgIfE/Vc+EAvkJE4em8wKEuYECv /bkghxj7vExd537BMYeRcwMqxi1ChOLSpLLdI1MtZLKspMzyjJTczM0TU0MNPLTS0uTkxPzUl MKtZLzs/dxAgMBgYg2MH4Z37gIUZJDiYlUV6uqwERQnxJ+SmVGYnFGfFFpTmpxYcYZTg4lCR4 Z6kHRggJFqWmp1akZeYAwxImLcHBoyTCG6QClOYtLkjMLc5Mh0idYtTlWHdqyVMmIZa8/LxUK XHelSAzBECKMkrz4EbAYuQSo6yUMC8j0FFCPAWpRbmZJajyrxjFORiVhHk3gEzhycwrgdv0Cu gIJqAjRJf4gxxRkoiQkmpgNF3yy+vFrFtV15x7RMwe3jcJOVq7tH5VREKL4cz3jquuGp3YcCC eI3L2epd/JhpmlfJhh0u3hS87YPLsbzzbunuLztj/jb6v2r1nqbLRdv1ln9hFHbk+pa+RyjSa dKIqOP3no4nHyoSzFSN/igheNVURe6+r8q78em6N7QHB4/ULoxbKL+Tbq8RSnJFoqMVcVJwIA HR6exiMAgAA X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-12.tower-21.messagelabs.com!1481713769!48240089!14 X-Originating-IP: [134.134.136.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjQgPT4gMzkwOTcx\n X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 22919 invoked from network); 14 Dec 2016 11:10:13 -0000 Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by server-12.tower-21.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 14 Dec 2016 11:10:13 -0000 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP; 14 Dec 2016 03:10:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,346,1477983600"; d="scan'208";a="39863310" Received: from vmmmba-s2600wft.bj.intel.com ([10.240.193.63]) by orsmga004.jf.intel.com with ESMTP; 14 Dec 2016 03:10:10 -0800 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Wed, 14 Dec 2016 12:07:53 +0800 Message-Id: <1481688484-5093-14-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1481688484-5093-1-git-send-email-yi.y.sun@linux.intel.com> References: <1481688484-5093-1-git-send-email-yi.y.sun@linux.intel.com> Cc: wei.liu2@citrix.com, andrew.cooper3@citrix.com, dario.faggioli@citrix.com, he.chen@linux.intel.com, ian.jackson@eu.citrix.com, Yi Sun , mengxu@cis.upenn.edu, jbeulich@suse.com, chao.p.peng@linux.intel.com Subject: [Xen-devel] [PATCH v4 13/24] x86: refactor psr: implement CPU init and free flow for CDP. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch implements the CPU init and free flow for CDP including L3 CDP initialization callback function. Signed-off-by: Yi Sun --- xen/arch/x86/psr.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 98 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index ec757a2..09da12c 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -91,6 +91,7 @@ struct psr_cat_hw_info { struct feat_hw_info { union { struct psr_cat_hw_info l3_cat_info; + struct psr_cat_hw_info l3_cdp_info; }; }; @@ -213,6 +214,22 @@ struct feat_node { struct list_head list; }; +/* + * get_data - get DATA COS register value from input COS ID. + * @feat: the feature list entry. + * @cos: the COS ID. + */ +#define get_cdp_data(feat, cos) \ + ( feat->cos_reg_val[cos * 2] ) + +/* + * get_cdp_code - get CODE COS register value from input COS ID. + * @feat: the feature list entry. + * @cos: the COS ID. + */ +#define get_cdp_code(feat, cos) \ + ( feat->cos_reg_val[cos * 2 + 1] ) + struct psr_assoc { uint64_t val; uint64_t cos_mask; @@ -230,6 +247,7 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc); /* Declare feature list entry. */ static struct feat_node *feat_l3_cat; +static struct feat_node *feat_l3_cdp; /* Common functions. */ static void free_feature(struct psr_socket_info *info) @@ -252,6 +270,12 @@ static void free_feature(struct psr_socket_info *info) xfree(feat_l3_cat); feat_l3_cat = NULL; } + + if ( feat_l3_cdp ) + { + xfree(feat_l3_cdp); + feat_l3_cdp = NULL; + } } static bool_t psr_check_cbm(unsigned int cbm_len, uint64_t cbm) @@ -474,6 +498,61 @@ struct feat_ops l3_cat_ops = { .write_msr = l3_cat_write_msr, }; +/* L3 CDP callback functions implementation. */ +static void l3_cdp_init_feature(unsigned int eax, unsigned int ebx, + unsigned int ecx, unsigned int edx, + struct feat_node *feat, + struct psr_socket_info *info) +{ + struct psr_cat_hw_info l3_cdp; + unsigned int socket; + uint64_t val; + + /* No valid value so do not enable feature. */ + if ( !eax || !edx ) + return; + + l3_cdp.cbm_len = (eax & CAT_CBM_LEN_MASK) + 1; + /* Cut half of cos_max when CDP is enabled. */ + l3_cdp.cos_max = min(opt_cos_max, edx & CAT_COS_MAX_MASK) >> 1; + + /* cos=0 is reserved as default cbm(all ones). */ + get_cdp_code(feat, 0) = + (1ull << l3_cdp.cbm_len) - 1; + get_cdp_data(feat, 0) = + (1ull << l3_cdp.cbm_len) - 1; + + /* We only write mask1 since mask0 is always all ones by default. */ + wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << l3_cdp.cbm_len) - 1); + rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); + wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << PSR_L3_QOS_CDP_ENABLE_BIT)); + + feat->feature = PSR_SOCKET_L3_CDP; + __set_bit(PSR_SOCKET_L3_CDP, &info->feat_mask); + + feat->info.l3_cdp_info = l3_cdp; + + info->nr_feat++; + + /* Add this feature into list. */ + list_add_tail(&feat->list, &info->feat_list); + + socket = cpu_to_socket(smp_processor_id()); + printk(XENLOG_INFO "L3 CDP: enabled on socket %u, cos_max:%u, cbm_len:%u\n", + socket, feat->info.l3_cdp_info.cos_max, + feat->info.l3_cdp_info.cbm_len); +} + +static unsigned int l3_cdp_get_max_cos_max(const struct feat_node *feat) +{ + return feat->info.l3_cdp_info.cos_max; +} + +struct feat_ops l3_cdp_ops = { + .init_feature = l3_cdp_init_feature, + .get_max_cos_max = l3_cdp_get_max_cos_max, +}; + static void __init parse_psr_bool(char *s, char *value, char *feature, unsigned int mask) { @@ -1159,6 +1238,14 @@ static int cpu_prepare_work(unsigned int cpu) (feat_l3_cat = xzalloc(struct feat_node)) == NULL ) return -ENOMEM; + if ( feat_l3_cdp == NULL && + (feat_l3_cdp = xzalloc(struct feat_node)) == NULL ) + { + xfree(feat_l3_cat); + feat_l3_cat = NULL; + return -ENOMEM; + } + return 0; } @@ -1186,9 +1273,17 @@ static void cpu_init_work(void) { cpuid_count(PSR_CPUID_LEVEL_CAT, 1, &eax, &ebx, &ecx, &edx); - feat_tmp = feat_l3_cat; - feat_l3_cat = NULL; - feat_tmp->ops = l3_cat_ops; + if ( (ecx & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) && + !test_bit(PSR_SOCKET_L3_CDP, &info->feat_mask) ) + { + feat_tmp = feat_l3_cdp; + feat_l3_cdp = NULL; + feat_tmp->ops = l3_cdp_ops; + } else { + feat_tmp = feat_l3_cat; + feat_l3_cat = NULL; + feat_tmp->ops = l3_cat_ops; + } feat_tmp->ops.init_feature(eax, ebx, ecx, edx, feat_tmp, info); }