[v2,2/4] arm: store vcpu id in struct irq_pending

Commit Message

Stefano Stabellini Dec. 22, 2016, 2:15 a.m. UTC

We currently store the LR register number for every irq in irq_pending,
but we don't store the vcpu id. Thus, we know in which LR they are, but
we don't know the LR of which cpu. Fix this gap by adding a vcpu field
in struct pending_irq. Use the bytes that are currently used for
padding within the struct to avoid increasing the size of the struct.

Signed-off-by: Stefano Stabellini <[e-mail]>
---
 xen/arch/arm/gic.c         | 7 ++++++-
 xen/arch/arm/vgic.c        | 2 ++
 xen/include/asm-arm/vgic.h | 2 ++
 3 files changed, 10 insertions(+), 1 deletion(-)

Comments

Andrew Cooper Dec. 22, 2016, 11:52 a.m. UTC | #1

On 22/12/16 02:15, Stefano Stabellini wrote:
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 467333c..fde5b32 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -72,6 +72,8 @@ struct pending_irq
>   #define GIC_INVALID_LR         (uint8_t)~0
>       uint8_t lr;
>       uint8_t priority;
> +#define GIC_INVALID_VCPU       (uint8_t)~0
> +    uint8_t vcpu;

You probably want a BUILD_BUG_ON() somewhere to trip when the maximum 
number of domain vcpus exceeds 255.

~Andrew

Patch

diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index a5348f2..3189693 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -379,6 +379,7 @@  static inline void gic_set_lr(int lr, struct pending_irq *p,
     set_bit(GIC_IRQ_GUEST_VISIBLE, &p->status);
     clear_bit(GIC_IRQ_GUEST_QUEUED, &p->status);
     p->lr = lr;
+    p->vcpu = current->vcpu_id;
 }
 
 static inline void gic_add_to_lr_pending(struct vcpu *v, struct pending_irq *n)
@@ -501,14 +502,17 @@  static void gic_update_one_lr(struct vcpu *v, int i)
         if ( test_bit(GIC_IRQ_GUEST_ENABLED, &p->status) &&
              test_bit(GIC_IRQ_GUEST_QUEUED, &p->status) &&
              !test_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) )
+        {
+            p->vcpu = GIC_INVALID_VCPU;
             gic_raise_guest_irq(v, irq, p->priority);
-        else {
+        } else {
             list_del_init(&p->inflight);
             if ( test_and_clear_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) )
             {
                 struct vcpu *v_target = vgic_get_target_vcpu(v, irq);
                 irq_set_affinity(p->desc, cpumask_of(v_target->processor));
             }
+            p->vcpu = GIC_INVALID_VCPU;
         }
     }
 }
@@ -574,6 +578,7 @@  static void gic_restore_pending_irqs(struct vcpu *v)
 found:
             lr = p_r->lr;
             p_r->lr = GIC_INVALID_LR;
+            p_r->vcpu = GIC_INVALID_VCPU;
             set_bit(GIC_IRQ_GUEST_QUEUED, &p_r->status);
             clear_bit(GIC_IRQ_GUEST_VISIBLE, &p_r->status);
             gic_add_to_lr_pending(v, p_r);
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 364d5f0..f2e3eda 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -66,6 +66,8 @@  static void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq)
     INIT_LIST_HEAD(&p->inflight);
     INIT_LIST_HEAD(&p->lr_queue);
     p->irq = virq;
+    p->lr = GIC_INVALID_LR;
+    p->vcpu = GIC_INVALID_VCPU;
 }
 
 static void vgic_rank_init(struct vgic_irq_rank *rank, uint8_t index,
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 467333c..fde5b32 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -72,6 +72,8 @@  struct pending_irq
 #define GIC_INVALID_LR         (uint8_t)~0
     uint8_t lr;
     uint8_t priority;
+#define GIC_INVALID_VCPU       (uint8_t)~0
+    uint8_t vcpu;
     /* inflight is used to append instances of pending_irq to
      * vgic.inflight_irqs */
     struct list_head inflight;