From patchwork Thu Jan 19 06:01:22 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9525193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2268160437 for ; Thu, 19 Jan 2017 06:05:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF6B42860C for ; Thu, 19 Jan 2017 06:05:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C3EF22862A; Thu, 19 Jan 2017 06:05:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4D4A928610 for ; Thu, 19 Jan 2017 06:05:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cU5oq-0007O2-RX; Thu, 19 Jan 2017 06:03:32 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cU5op-0007Kq-2t for xen-devel@lists.xenproject.org; Thu, 19 Jan 2017 06:03:31 +0000 Received: from [85.158.137.68] by server-2.bemta-3.messagelabs.com id 12/5C-09690-2B650885; Thu, 19 Jan 2017 06:03:30 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPLMWRWlGSWpSXmKPExsVywNykWHdjWEO EQdsXU4vvWyYzOTB6HP5whSWAMYo1My8pvyKBNWPjniXMBWu0KtYctmtgbJPvYuTiEBKYzijx 5ekepi5GTg4JAV6JI8tmsELY/hJ/5r9mhChqYJTYvOUQI0iCTUBd4vHXHrAGEQEliXurJjOBF DELdDNJrHy4lQUkISzgLjHl6nFmEJtFQFXi5s02sDivgIfEmslPmSE2yEmcPDYZbBsnUPzK/A vsILYQUO+WFZeYJjDyLmBkWMWoUZxaVJZapGtsoJdUlJmeUZKbmJmja2hgrJebWlycmJ6ak5h UrJecn7uJERgQ9QwMjDsYO0/4HWKU5GBSEuW1t2yIEOJLyk+pzEgszogvKs1JLT7EKMPBoSTB OycUKCdYlJqeWpGWmQMMTZi0BAePkghvFUiat7ggMbc4Mx0idYpRUUqcNwokIQCSyCjNg2uDx cMlRlkpYV5GBgYGIZ6C1KLczBJU+VeM4hyMSsK830Gm8GTmlcBNfwW0mAlosZVyPcjikkSElF QDo/PbdT2nlM7/spwz+a6Vtqzk5YUZs9yyLjT7vJ97ajtj2oY5U6+9nL7h0Qw1tg8Xl0666JK 1yEH02R2NF9e3nbh9nHvzrcZ5T7bMu5QZctr83/SV7cxbbh29dynh7zRWRsV0k6KdsllXhdO/ uygxuSqkv/NYmtauN9HhefZKzf2XUrtudFccKddQYinOSDTUYi4qTgQA3/fw84ICAAA= X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-13.tower-31.messagelabs.com!1484805800!80652688!6 X-Originating-IP: [192.55.52.115] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 3963 invoked from network); 19 Jan 2017 06:03:29 -0000 Received: from mga14.intel.com (HELO mga14.intel.com) (192.55.52.115) by server-13.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 19 Jan 2017 06:03:29 -0000 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jan 2017 22:03:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,252,1477983600"; d="scan'208";a="215119636" Received: from vmmmba-s2600wft.bj.intel.com ([10.240.193.63]) by fmsmga004.fm.intel.com with ESMTP; 18 Jan 2017 22:03:26 -0800 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Thu, 19 Jan 2017 14:01:22 +0800 Message-Id: <1484805686-7249-21-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484805686-7249-1-git-send-email-yi.y.sun@linux.intel.com> References: <1484805686-7249-1-git-send-email-yi.y.sun@linux.intel.com> Cc: wei.liu2@citrix.com, konrad.wilk@oracle.com, andrew.cooper3@citrix.com, dario.faggioli@citrix.com, he.chen@linux.intel.com, ian.jackson@eu.citrix.com, Yi Sun , mengxu@cis.upenn.edu, jbeulich@suse.com, chao.p.peng@linux.intel.com Subject: [Xen-devel] [PATCH RESEND v5 20/24] x86: L2 CAT: implement set value flow. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch implements L2 CAT set value related callback functions and domctl interface. Signed-off-by: Yi Sun --- v5: - remove type check in callback function. - modify return value of callback functions because we do not need them to return number of entries the feature uses. In caller, we call 'get_cos_num' to get the number of entries the feature uses. - remove 'l2_cat_get_cos_max_from_type'. - rename 'l2_cat_exceeds_cos_max' to 'l2_cat_fits_cos_max'. --- xen/arch/x86/domctl.c | 6 +++ xen/arch/x86/psr.c | 92 +++++++++++++++++++++++++++++++++++++++++ xen/include/asm-x86/msr-index.h | 1 + xen/include/public/domctl.h | 1 + 4 files changed, 100 insertions(+) diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index af6153d..2767c6a 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -1382,6 +1382,12 @@ long arch_do_domctl( PSR_CBM_TYPE_L3_DATA); break; + case XEN_DOMCTL_PSR_CAT_OP_SET_L2_CBM: + ret = psr_set_val(d, domctl->u.psr_cat_op.target, + domctl->u.psr_cat_op.data, + PSR_CBM_TYPE_L2); + break; + case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CBM: ret = psr_get_val(d, domctl->u.psr_cat_op.target, &domctl->u.psr_cat_op.data, diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 1fad540..13d85e0 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -741,10 +741,102 @@ static bool l2_cat_get_val(const struct feat_node *feat, unsigned int cos, return true; } +static unsigned int l2_cat_get_cos_num(const struct feat_node *feat) +{ + /* L2 CAT uses one COS. */ + return 1; +} + +static int l2_cat_get_old_val(uint64_t val[], + const struct feat_node *feat, + unsigned int old_cos) +{ + if ( old_cos > feat->info.l2_cat_info.cos_max ) + /* Use default value. */ + old_cos = 0; + + val[0] = feat->cos_reg_val[old_cos]; + + return 0; +} + +static int l2_cat_set_new_val(uint64_t val[], + const struct feat_node *feat, + enum cbm_type type, + uint64_t m) +{ + if ( !psr_check_cbm(feat->info.l2_cat_info.cbm_len, m) ) + return -EINVAL; + + val[0] = m; + + return 0; +} + +static int l2_cat_compare_val(const uint64_t val[], + const struct feat_node *feat, + unsigned int cos, bool *found) +{ + uint64_t l2_def_cbm; + + l2_def_cbm = (1ull << feat->info.l2_cat_info.cbm_len) - 1; + + if ( cos > feat->info.l2_cat_info.cos_max ) + { + if ( val[0] != l2_def_cbm ) + { + *found = false; + return -ENOENT; + } + *found = true; + } + else + *found = (val[0] == feat->cos_reg_val[cos]); + + return 0; +} + +static bool l2_cat_fits_cos_max(const uint64_t val[], + const struct feat_node *feat, + unsigned int cos) +{ + uint64_t l2_def_cbm; + + l2_def_cbm = (1ull << feat->info.l2_cat_info.cbm_len) - 1; + + if ( cos > feat->info.l2_cat_info.cos_max && + val[0] != l2_def_cbm ) + /* + * Exceed cos_max and value to set is not default, + * return error. + */ + return false; + + return true; +} + +static int l2_cat_write_msr(unsigned int cos, const uint64_t val[], + struct feat_node *feat) +{ + if ( cos > feat->info.l2_cat_info.cos_max ) + return -EINVAL; + + feat->cos_reg_val[cos] = val[0]; + wrmsrl(MSR_IA32_PSR_L2_MASK(cos), val[0]); + + return 0; +} + struct feat_ops l2_cat_ops = { .get_cos_max = l2_cat_get_cos_max, .get_feat_info = l2_cat_get_feat_info, .get_val = l2_cat_get_val, + .get_cos_num = l2_cat_get_cos_num, + .get_old_val = l2_cat_get_old_val, + .set_new_val = l2_cat_set_new_val, + .compare_val = l2_cat_compare_val, + .fits_cos_max = l2_cat_fits_cos_max, + .write_msr = l2_cat_write_msr, }; static void __init parse_psr_bool(char *s, char *value, char *feature, diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h index 98dbff1..a41e63a 100644 --- a/xen/include/asm-x86/msr-index.h +++ b/xen/include/asm-x86/msr-index.h @@ -343,6 +343,7 @@ #define MSR_IA32_PSR_L3_MASK(n) (0x00000c90 + (n)) #define MSR_IA32_PSR_L3_MASK_CODE(n) (0x00000c90 + (n) * 2 + 1) #define MSR_IA32_PSR_L3_MASK_DATA(n) (0x00000c90 + (n) * 2) +#define MSR_IA32_PSR_L2_MASK(n) (0x00000d10 + (n)) /* Intel Model 6 */ #define MSR_P6_PERFCTR(n) (0x000000c1 + (n)) diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8c183ba..523a2cd 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1138,6 +1138,7 @@ struct xen_domctl_psr_cat_op { #define XEN_DOMCTL_PSR_CAT_OP_SET_L3_DATA 3 #define XEN_DOMCTL_PSR_CAT_OP_GET_L3_CODE 4 #define XEN_DOMCTL_PSR_CAT_OP_GET_L3_DATA 5 +#define XEN_DOMCTL_PSR_CAT_OP_SET_L2_CBM 6 #define XEN_DOMCTL_PSR_CAT_OP_GET_L2_CBM 7 uint32_t cmd; /* IN: XEN_DOMCTL_PSR_CAT_OP_* */ uint32_t target; /* IN */