From patchwork Wed Feb 8 08:16:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9561947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BD8C260236 for ; Wed, 8 Feb 2017 08:22:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AF33728441 for ; Wed, 8 Feb 2017 08:22:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A41E128488; Wed, 8 Feb 2017 08:22:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 80EA728441 for ; Wed, 8 Feb 2017 08:22:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cbNTY-00065s-J2; Wed, 08 Feb 2017 08:19:40 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cbNTX-00064D-9D for xen-devel@lists.xenproject.org; Wed, 08 Feb 2017 08:19:39 +0000 Received: from [85.158.139.211] by server-1.bemta-5.messagelabs.com id 06/C8-01971-A94DA985; Wed, 08 Feb 2017 08:19:38 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJLMWRWlGSWpSXmKPExsXS1tbhqDvryqw Ig4sXmS2+b5nM5MDocfjDFZYAxijWzLyk/IoE1ozPKyMKbqpXTDx2ibGBcY1sFyMnh5BApcTW d8+ZQGwJAV6JI8tmsELYfhKn5u9k6WLkAqppYJTofLkQLMEmoC7x+GsPWIOIgJLEvVWTmUCKm AUWMUmsmPSdDSQhLBAm0db/E6yBRUBV4sii+YwgNq+Ah0TH9U42iA1yEiePTQaq4eDgBIqvWS AHcZC7xPWTM1gmMPIuYGRYxahRnFpUllqka2iol1SUmZ5RkpuYmaNraGCql5taXJyYnpqTmFS sl5yfu4kRGAwMQLCDcWW78yFGSQ4mJVFexlOzIoT4kvJTKjMSizPii0pzUosPMcpwcChJ8LIB g0tIsCg1PbUiLTMHGJYwaQkOHiUR3sOXgdK8xQWJucWZ6RCpU4y6HF92nnnJJMSSl5+XKiUOU SQAUpRRmgc3AhYjlxhlpYR5GYGOEuIpSC3KzSxBlX/FKM7BqCTMGw4yhSczrwRu0yugI5iAjr h+GuyIkkSElFQDo8Cx+AVzV+1Ztyq58vGJI47pH61/XD72Jz053/vMrNVrfRf03rjivDt93vY S1vM/eKa8Wea5s155KX+ngXbpgm6b+pXcz5v27+lf8UP0wPUihvQA7iTvqeXvPzkHxkreur+y R1x6evT1Hz7NnEYzz2cVFfisfH1J+dLnEwKOjeUMNlscN4X95FViKc5INNRiLipOBABT7Ae1j AIAAA== X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-6.tower-206.messagelabs.com!1486541945!83610550!14 X-Originating-IP: [134.134.136.65] X-SpamReason: No, hits=0.5 required=7.0 tests=BODY_RANDOM_LONG X-StarScan-Received: X-StarScan-Version: 9.1.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 64117 invoked from network); 8 Feb 2017 08:19:37 -0000 Received: from mga03.intel.com (HELO mga03.intel.com) (134.134.136.65) by server-6.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 8 Feb 2017 08:19:37 -0000 Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga103.jf.intel.com with ESMTP; 08 Feb 2017 00:19:36 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,346,1477983600"; d="scan'208";a="63203531" Received: from vmmmba-s2600wft.bj.intel.com ([10.240.193.63]) by fmsmga006.fm.intel.com with ESMTP; 08 Feb 2017 00:19:34 -0800 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Wed, 8 Feb 2017 16:16:05 +0800 Message-Id: <1486541776-8406-14-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1486541776-8406-1-git-send-email-yi.y.sun@linux.intel.com> References: <1486541776-8406-1-git-send-email-yi.y.sun@linux.intel.com> Cc: kevin.tian@intel.com, wei.liu2@citrix.com, andrew.cooper3@citrix.com, dario.faggioli@citrix.com, he.chen@linux.intel.com, ian.jackson@eu.citrix.com, Yi Sun , mengxu@cis.upenn.edu, jbeulich@suse.com, chao.p.peng@linux.intel.com Subject: [Xen-devel] [PATCH v6 13/24] x86: refactor psr: implement CPU init and free flow for CDP. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch implements the CPU init and free flow for CDP including L3 CDP initialization callback function. Signed-off-by: Yi Sun --- v6: - use 'struct cpuid_leaf' in x86_emulate.h. - use cpuid_count_leaf() to get cpuid info. --- xen/arch/x86/psr.c | 104 +++++++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 98 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 23bf8d8..0739c1c 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -97,6 +97,7 @@ struct psr_cat_hw_info { struct feat_hw_info { union { struct psr_cat_hw_info l3_cat_info; + struct psr_cat_hw_info l3_cdp_info; }; }; @@ -195,6 +196,22 @@ struct feat_node { struct list_head list; }; +/* + * get_data - get DATA COS register value from input COS ID. + * @feat: the feature list entry. + * @cos: the COS ID. + */ +#define get_cdp_data(feat, cos) \ + ( feat->cos_reg_val[cos * 2] ) + +/* + * get_cdp_code - get CODE COS register value from input COS ID. + * @feat: the feature list entry. + * @cos: the COS ID. + */ +#define get_cdp_code(feat, cos) \ + ( feat->cos_reg_val[cos * 2 + 1] ) + struct psr_assoc { uint64_t val; uint64_t cos_mask; @@ -217,6 +234,7 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc); * cpu_add_remove_lock spinlock. */ static struct feat_node *feat_l3_cat; +static struct feat_node *feat_l3_cdp; /* Common functions. */ static void free_feature(struct psr_socket_info *info) @@ -454,6 +472,63 @@ static const struct feat_ops l3_cat_ops = { .write_msr = l3_cat_write_msr, }; +/* L3 CDP functions implementation. */ +static void l3_cdp_init_feature(struct cpuid_leaf regs, + struct feat_node *feat, + struct psr_socket_info *info) +{ + struct psr_cat_hw_info l3_cdp; + unsigned int socket; + uint64_t val; + + /* No valid value so do not enable feature. */ + if ( !regs.a || !regs.d ) + return; + + l3_cdp.cbm_len = (regs.a & CAT_CBM_LEN_MASK) + 1; + /* Cut half of cos_max when CDP is enabled. */ + l3_cdp.cos_max = min(opt_cos_max, regs.d & CAT_COS_MAX_MASK) >> 1; + + /* cos=0 is reserved as default cbm(all ones). */ + get_cdp_code(feat, 0) = + (1ull << l3_cdp.cbm_len) - 1; + get_cdp_data(feat, 0) = + (1ull << l3_cdp.cbm_len) - 1; + + /* We only write mask1 since mask0 is always all ones by default. */ + wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << l3_cdp.cbm_len) - 1); + rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); + wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << PSR_L3_QOS_CDP_ENABLE_BIT)); + + feat->feature = PSR_SOCKET_L3_CDP; + ASSERT(!test_bit(PSR_SOCKET_L3_CDP, &info->feat_mask)); + __set_bit(PSR_SOCKET_L3_CDP, &info->feat_mask); + + feat->info.l3_cdp_info = l3_cdp; + + info->nr_feat++; + + /* Add this feature into list. */ + list_add_tail(&feat->list, &info->feat_list); + + socket = cpu_to_socket(smp_processor_id()); + if ( !opt_cpu_info ) + return; + + printk(XENLOG_INFO "L3 CDP: enabled on socket %u, cos_max:%u, cbm_len:%u\n", + socket, feat->info.l3_cdp_info.cos_max, + feat->info.l3_cdp_info.cbm_len); +} + +static unsigned int l3_cdp_get_cos_max(const struct feat_node *feat) +{ + return feat->info.l3_cdp_info.cos_max; +} + +struct feat_ops l3_cdp_ops = { + .get_cos_max = l3_cdp_get_cos_max, +}; + static void __init parse_psr_bool(char *s, char *value, char *feature, unsigned int mask) { @@ -1211,12 +1286,21 @@ static void cpu_init_work(void) { cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 1, ®s); - feat = feat_l3_cat; - /* psr_cpu_prepare will allocate it on subsequent CPU onlining. */ - feat_l3_cat = NULL; - feat->ops = l3_cat_ops; - - l3_cat_init_feature(regs, feat, info); + if ( (regs.c & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) && + !test_bit(PSR_SOCKET_L3_CDP, &info->feat_mask) ) + { + feat = feat_l3_cdp; + /* psr_cpu_prepare will allocate it on subsequent CPU onlining. */ + feat_l3_cdp = NULL; + feat->ops = l3_cdp_ops; + l3_cdp_init_feature(regs, feat, info); + } else { + feat = feat_l3_cat; + /* psr_cpu_prepare will allocate it on subsequent CPU onlining. */ + feat_l3_cat = NULL; + feat->ops = l3_cat_ops; + l3_cat_init_feature(regs, feat, info); + } } } @@ -1268,6 +1352,14 @@ static int psr_cpu_prepare(unsigned int cpu) (feat_l3_cat = xzalloc(struct feat_node)) == NULL ) return -ENOMEM; + if ( feat_l3_cdp == NULL && + (feat_l3_cdp = xzalloc(struct feat_node)) == NULL ) + { + xfree(feat_l3_cat); + feat_l3_cat = NULL; + return -ENOMEM; + } + return 0; }