From patchwork Sat Apr 1 13:53:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9657965 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 978686035D for ; Sat, 1 Apr 2017 13:56:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8DC61285C2 for ; Sat, 1 Apr 2017 13:56:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 827EA28610; Sat, 1 Apr 2017 13:56:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4B1A7285C2 for ; Sat, 1 Apr 2017 13:56:21 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cuJTI-0005SU-Ru; Sat, 01 Apr 2017 13:53:40 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cuJTH-0005SC-Gp for xen-devel@lists.xenproject.org; Sat, 01 Apr 2017 13:53:39 +0000 Received: from [85.158.137.68] by server-8.bemta-3.messagelabs.com id 76/E7-00609-2E0BFD85; Sat, 01 Apr 2017 13:53:38 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeJIrShJLcpLzFFi42Jpa+sQ0X244X6 EweVtphbft0xmcmD0OPzhCksAYxRrZl5SfkUCa8aGmxOYCxa1MVas/POZvYFxclIXIxcHi8At JomTs+6zgjhCAtMYJU487mfqYuTkkBDglTiybAYrhO0v8fbUTjBbSKBe4smzbcwgNpuAusTjr z1g9SICShL3Vk1mAhnELLCTSWLd6e9gRcICbhIPZm1gA7FZBFQlvrzfDhbnFfCQWHW7H2qBnM TJY5PBbE4BT4krL/axQCwDqpl0iXkCI98CRoZVjBrFqUVlqUW6hhZ6SUWZ6RkluYmZObqGBsZ 6uanFxYnpqTmJScV6yfm5mxiBwVLPwMC4g/H3ac9DjJIcTEqivN+L70UI8SXlp1RmJBZnxBeV 5qQWH2KU4eBQkuBVAAafkGBRanpqRVpmDjBsYdISHDxKIrzH1gOleYsLEnOLM9MhUqcYdTluN ex5wyTEkpeflyolzvsMpEgApCijNA9uBCyGLjHKSgnzMjIwMAjxFKQW5WaWoMq/YhTnYFQS5p UHmcKTmVcCt+kV0BFMQEdYfL0LckRJIkJKqoFxy+bW29kf30fLPo7b+USciyFIQ6awYVEB87c gV+7nrq1zePz8HnKGN8f8b5vc+CLfhktzImepSfsFbrZq9ofnH5Tf5t1yfn/2TiuxvzU/mDcu 5OiOOpXxUyFmOkewa4DM0a1FV7y9KmYzsejr5a51aRRw2GkaYHo9fHfrdT15V3mTtlm/5yuxF GckGmoxFxUnAgAncBnAnAIAAA== X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-9.tower-31.messagelabs.com!1491054811!37933881!3 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 49416 invoked from network); 1 Apr 2017 13:53:37 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-9.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 1 Apr 2017 13:53:37 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491054817; x=1522590817; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Is8l6vTlgfFWZQn0vIVUdPTaJz5sgVrTiDPxy6onqMY=; b=ITwQtacbQTAfOOpJ+6lrldIRJ6jGZ8WFC3I7WE7ly9hChpq3MYCt5k6z ZKPIOWBQ9SU6M3onILnqLEsLqEaYrQ==; Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2017 06:53:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,258,1486454400"; d="scan'208";a="950544307" Received: from yisun1-ubuntu.bj.intel.com ([10.238.156.112]) by orsmga003.jf.intel.com with ESMTP; 01 Apr 2017 06:53:33 -0700 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Sat, 1 Apr 2017 21:53:33 +0800 Message-Id: <1491054836-30488-3-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491054836-30488-1-git-send-email-yi.y.sun@linux.intel.com> References: <1491054836-30488-1-git-send-email-yi.y.sun@linux.intel.com> Cc: kevin.tian@intel.com, wei.liu2@citrix.com, andrew.cooper3@citrix.com, dario.faggioli@citrix.com, he.chen@linux.intel.com, ian.jackson@eu.citrix.com, Yi Sun , mengxu@cis.upenn.edu, jbeulich@suse.com, chao.p.peng@linux.intel.com, roger.pau@citrix.com Subject: [Xen-devel] [PATCH v10 02/25] x86: refactor psr: remove L3 CAT/CDP codes. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP The current cache allocation codes in psr.c do not consider future features addition and are not friendly to extend. To make psr.c be more flexible to add new features and fulfill the program principle, open for extension but closed for modification, we have to refactor the psr.c: 1. Analyze cache allocation features and abstract general data structures. 2. Analyze the init and all other functions flow, abstract all steps that different features may have different implementations. Make these steps be callback functions and register feature specific fuctions. Then, the main processes will not be changed when introducing a new feature. Because the quantity of refactor codes is big and the logics are changed a lot, it will cause reviewers confused if just change old codes. Reviewers have to understand both old codes and new implementations. After review iterations from V1 to V3, Jan has proposed to remove all old cache allocation codes firstly, then implement new codes step by step. This will help to make codes be more easily reviewable. There is no construction without destruction. So, this patch removes all current L3 CAT/CDP codes in psr.c. The following patches will introduce the new mechanism. Signed-off-by: Yi Sun Acked-by: Jan Beulich Reviewed-by: Konrad Rzeszutek Wilk Reviewed-by: Wei Liu --- v4: - create this patch to make codes easily understand. (suggested by Jan Beulich) --- xen/arch/x86/psr.c | 470 +---------------------------------------------------- 1 file changed, 5 insertions(+), 465 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 0b5073c..96a8589 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -23,24 +23,6 @@ #define PSR_CAT (1<<1) #define PSR_CDP (1<<2) -struct psr_cat_cbm { - union { - uint64_t cbm; - struct { - uint64_t code; - uint64_t data; - }; - }; - unsigned int ref; -}; - -struct psr_cat_socket_info { - unsigned int cbm_len; - unsigned int cos_max; - struct psr_cat_cbm *cos_to_cbm; - spinlock_t cbm_lock; -}; - struct psr_assoc { uint64_t val; uint64_t cos_mask; @@ -48,26 +30,11 @@ struct psr_assoc { struct psr_cmt *__read_mostly psr_cmt; -static unsigned long *__read_mostly cat_socket_enable; -static struct psr_cat_socket_info *__read_mostly cat_socket_info; -static unsigned long *__read_mostly cdp_socket_enable; - static unsigned int opt_psr; static unsigned int __initdata opt_rmid_max = 255; -static unsigned int __read_mostly opt_cos_max = 255; static uint64_t rmid_mask; static DEFINE_PER_CPU(struct psr_assoc, psr_assoc); -static struct psr_cat_cbm *temp_cos_to_cbm; - -static unsigned int get_socket_cpu(unsigned int socket) -{ - if ( likely(socket < nr_sockets) ) - return cpumask_any(socket_cpumask[socket]); - - return nr_cpu_ids; -} - static void __init parse_psr_bool(char *s, char *value, char *feature, unsigned int mask) { @@ -107,9 +74,6 @@ static void __init parse_psr_param(char *s) if ( val_str && !strcmp(s, "rmid_max") ) opt_rmid_max = simple_strtoul(val_str, NULL, 0); - if ( val_str && !strcmp(s, "cos_max") ) - opt_cos_max = simple_strtoul(val_str, NULL, 0); - s = ss + 1; } while ( ss ); } @@ -213,16 +177,7 @@ static inline void psr_assoc_init(void) { struct psr_assoc *psra = &this_cpu(psr_assoc); - if ( cat_socket_info ) - { - unsigned int socket = cpu_to_socket(smp_processor_id()); - - if ( test_bit(socket, cat_socket_enable) ) - psra->cos_mask = ((1ull << get_count_order( - cat_socket_info[socket].cos_max)) - 1) << 32; - } - - if ( psr_cmt_enabled() || psra->cos_mask ) + if ( psr_cmt_enabled() ) rdmsrl(MSR_IA32_PSR_ASSOC, psra->val); } @@ -231,12 +186,6 @@ static inline void psr_assoc_rmid(uint64_t *reg, unsigned int rmid) *reg = (*reg & ~rmid_mask) | (rmid & rmid_mask); } -static inline void psr_assoc_cos(uint64_t *reg, unsigned int cos, - uint64_t cos_mask) -{ - *reg = (*reg & ~cos_mask) | (((uint64_t)cos << 32) & cos_mask); -} - void psr_ctxt_switch_to(struct domain *d) { struct psr_assoc *psra = &this_cpu(psr_assoc); @@ -245,459 +194,54 @@ void psr_ctxt_switch_to(struct domain *d) if ( psr_cmt_enabled() ) psr_assoc_rmid(®, d->arch.psr_rmid); - if ( psra->cos_mask ) - psr_assoc_cos(®, d->arch.psr_cos_ids ? - d->arch.psr_cos_ids[cpu_to_socket(smp_processor_id())] : - 0, psra->cos_mask); - if ( reg != psra->val ) { wrmsrl(MSR_IA32_PSR_ASSOC, reg); psra->val = reg; } } -static struct psr_cat_socket_info *get_cat_socket_info(unsigned int socket) -{ - if ( !cat_socket_info ) - return ERR_PTR(-ENODEV); - - if ( socket >= nr_sockets ) - return ERR_PTR(-ENOTSOCK); - - if ( !test_bit(socket, cat_socket_enable) ) - return ERR_PTR(-ENOENT); - - return cat_socket_info + socket; -} - -static inline bool_t cdp_is_enabled(unsigned int socket) -{ - return cdp_socket_enable && test_bit(socket, cdp_socket_enable); -} int psr_get_cat_l3_info(unsigned int socket, uint32_t *cbm_len, uint32_t *cos_max, uint32_t *flags) { - struct psr_cat_socket_info *info = get_cat_socket_info(socket); - - if ( IS_ERR(info) ) - return PTR_ERR(info); - - *cbm_len = info->cbm_len; - *cos_max = info->cos_max; - - *flags = 0; - if ( cdp_is_enabled(socket) ) - *flags |= XEN_SYSCTL_PSR_CAT_L3_CDP; - return 0; } int psr_get_l3_cbm(struct domain *d, unsigned int socket, uint64_t *cbm, enum cbm_type type) { - struct psr_cat_socket_info *info = get_cat_socket_info(socket); - bool_t cdp_enabled = cdp_is_enabled(socket); - - if ( IS_ERR(info) ) - return PTR_ERR(info); - - switch ( type ) - { - case PSR_CBM_TYPE_L3: - if ( cdp_enabled ) - return -EXDEV; - *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm; - break; - - case PSR_CBM_TYPE_L3_CODE: - if ( !cdp_enabled ) - *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm; - else - *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].code; - break; - - case PSR_CBM_TYPE_L3_DATA: - if ( !cdp_enabled ) - *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].cbm; - else - *cbm = info->cos_to_cbm[d->arch.psr_cos_ids[socket]].data; - break; - - default: - ASSERT_UNREACHABLE(); - } - - return 0; -} - -static bool_t psr_check_cbm(unsigned int cbm_len, uint64_t cbm) -{ - unsigned int first_bit, zero_bit; - - /* Set bits should only in the range of [0, cbm_len). */ - if ( cbm & (~0ull << cbm_len) ) - return 0; - - /* At least one bit need to be set. */ - if ( cbm == 0 ) - return 0; - - first_bit = find_first_bit(&cbm, cbm_len); - zero_bit = find_next_zero_bit(&cbm, cbm_len, first_bit); - - /* Set bits should be contiguous. */ - if ( zero_bit < cbm_len && - find_next_bit(&cbm, cbm_len, zero_bit) < cbm_len ) - return 0; - - return 1; -} - -struct cos_cbm_info -{ - unsigned int cos; - bool_t cdp; - uint64_t cbm_code; - uint64_t cbm_data; -}; - -static void do_write_l3_cbm(void *data) -{ - struct cos_cbm_info *info = data; - - if ( info->cdp ) - { - wrmsrl(MSR_IA32_PSR_L3_MASK_CODE(info->cos), info->cbm_code); - wrmsrl(MSR_IA32_PSR_L3_MASK_DATA(info->cos), info->cbm_data); - } - else - wrmsrl(MSR_IA32_PSR_L3_MASK(info->cos), info->cbm_code); -} - -static int write_l3_cbm(unsigned int socket, unsigned int cos, - uint64_t cbm_code, uint64_t cbm_data, bool_t cdp) -{ - struct cos_cbm_info info = - { - .cos = cos, - .cbm_code = cbm_code, - .cbm_data = cbm_data, - .cdp = cdp, - }; - - if ( socket == cpu_to_socket(smp_processor_id()) ) - do_write_l3_cbm(&info); - else - { - unsigned int cpu = get_socket_cpu(socket); - - if ( cpu >= nr_cpu_ids ) - return -ENOTSOCK; - on_selected_cpus(cpumask_of(cpu), do_write_l3_cbm, &info, 1); - } - return 0; } -static int find_cos(struct psr_cat_cbm *map, unsigned int cos_max, - uint64_t cbm_code, uint64_t cbm_data, bool_t cdp_enabled) -{ - unsigned int cos; - - for ( cos = 0; cos <= cos_max; cos++ ) - { - if ( (map[cos].ref || cos == 0) && - ((!cdp_enabled && map[cos].cbm == cbm_code) || - (cdp_enabled && map[cos].code == cbm_code && - map[cos].data == cbm_data)) ) - return cos; - } - - return -ENOENT; -} - -static int pick_avail_cos(struct psr_cat_cbm *map, unsigned int cos_max, - unsigned int old_cos) -{ - unsigned int cos; - - /* If old cos is referred only by the domain, then use it. */ - if ( map[old_cos].ref == 1 && old_cos != 0 ) - return old_cos; - - /* Find an unused one other than cos0. */ - for ( cos = 1; cos <= cos_max; cos++ ) - if ( map[cos].ref == 0 ) - return cos; - - return -ENOENT; -} - int psr_set_l3_cbm(struct domain *d, unsigned int socket, uint64_t cbm, enum cbm_type type) { - unsigned int old_cos, cos_max; - int cos, ret; - uint64_t cbm_data, cbm_code; - bool_t cdp_enabled = cdp_is_enabled(socket); - struct psr_cat_cbm *map; - struct psr_cat_socket_info *info = get_cat_socket_info(socket); - - if ( IS_ERR(info) ) - return PTR_ERR(info); - - if ( !psr_check_cbm(info->cbm_len, cbm) ) - return -EINVAL; - - if ( !cdp_enabled && (type == PSR_CBM_TYPE_L3_CODE || - type == PSR_CBM_TYPE_L3_DATA) ) - return -ENXIO; - - cos_max = info->cos_max; - old_cos = d->arch.psr_cos_ids[socket]; - map = info->cos_to_cbm; - - switch ( type ) - { - case PSR_CBM_TYPE_L3: - cbm_code = cbm; - cbm_data = cbm; - break; - - case PSR_CBM_TYPE_L3_CODE: - cbm_code = cbm; - cbm_data = map[old_cos].data; - break; - - case PSR_CBM_TYPE_L3_DATA: - cbm_code = map[old_cos].code; - cbm_data = cbm; - break; - - default: - ASSERT_UNREACHABLE(); - return -EINVAL; - } - - spin_lock(&info->cbm_lock); - cos = find_cos(map, cos_max, cbm_code, cbm_data, cdp_enabled); - if ( cos >= 0 ) - { - if ( cos == old_cos ) - { - spin_unlock(&info->cbm_lock); - return 0; - } - } - else - { - cos = pick_avail_cos(map, cos_max, old_cos); - if ( cos < 0 ) - { - spin_unlock(&info->cbm_lock); - return cos; - } - - /* We try to avoid writing MSR. */ - if ( (cdp_enabled && - (map[cos].code != cbm_code || map[cos].data != cbm_data)) || - (!cdp_enabled && map[cos].cbm != cbm_code) ) - { - ret = write_l3_cbm(socket, cos, cbm_code, cbm_data, cdp_enabled); - if ( ret ) - { - spin_unlock(&info->cbm_lock); - return ret; - } - map[cos].code = cbm_code; - map[cos].data = cbm_data; - } - } - - map[cos].ref++; - map[old_cos].ref--; - spin_unlock(&info->cbm_lock); - - d->arch.psr_cos_ids[socket] = cos; - return 0; } -/* Called with domain lock held, no extra lock needed for 'psr_cos_ids' */ -static void psr_free_cos(struct domain *d) -{ - unsigned int socket; - unsigned int cos; - struct psr_cat_socket_info *info; - - if( !d->arch.psr_cos_ids ) - return; - - for_each_set_bit(socket, cat_socket_enable, nr_sockets) - { - if ( (cos = d->arch.psr_cos_ids[socket]) == 0 ) - continue; - - info = cat_socket_info + socket; - spin_lock(&info->cbm_lock); - info->cos_to_cbm[cos].ref--; - spin_unlock(&info->cbm_lock); - } - - xfree(d->arch.psr_cos_ids); - d->arch.psr_cos_ids = NULL; -} - int psr_domain_init(struct domain *d) { - if ( cat_socket_info ) - { - d->arch.psr_cos_ids = xzalloc_array(unsigned int, nr_sockets); - if ( !d->arch.psr_cos_ids ) - return -ENOMEM; - } - return 0; } void psr_domain_free(struct domain *d) { psr_free_rmid(d); - psr_free_cos(d); -} - -static int cat_cpu_prepare(unsigned int cpu) -{ - if ( !cat_socket_info ) - return 0; - - if ( temp_cos_to_cbm == NULL && - (temp_cos_to_cbm = xzalloc_array(struct psr_cat_cbm, - opt_cos_max + 1UL)) == NULL ) - return -ENOMEM; - - return 0; -} - -static void cat_cpu_init(void) -{ - unsigned int eax, ebx, ecx, edx; - struct psr_cat_socket_info *info; - unsigned int socket; - unsigned int cpu = smp_processor_id(); - uint64_t val; - const struct cpuinfo_x86 *c = cpu_data + cpu; - - if ( !cpu_has(c, X86_FEATURE_PQE) || c->cpuid_level < PSR_CPUID_LEVEL_CAT ) - return; - - socket = cpu_to_socket(cpu); - if ( test_bit(socket, cat_socket_enable) ) - return; - - cpuid_count(PSR_CPUID_LEVEL_CAT, 0, &eax, &ebx, &ecx, &edx); - if ( ebx & PSR_RESOURCE_TYPE_L3 ) - { - cpuid_count(PSR_CPUID_LEVEL_CAT, 1, &eax, &ebx, &ecx, &edx); - info = cat_socket_info + socket; - info->cbm_len = (eax & 0x1f) + 1; - info->cos_max = min(opt_cos_max, edx & 0xffff); - - info->cos_to_cbm = temp_cos_to_cbm; - temp_cos_to_cbm = NULL; - /* cos=0 is reserved as default cbm(all ones). */ - info->cos_to_cbm[0].cbm = (1ull << info->cbm_len) - 1; - - spin_lock_init(&info->cbm_lock); - - set_bit(socket, cat_socket_enable); - - if ( (ecx & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) && - cdp_socket_enable && !test_bit(socket, cdp_socket_enable) ) - { - info->cos_to_cbm[0].code = (1ull << info->cbm_len) - 1; - info->cos_to_cbm[0].data = (1ull << info->cbm_len) - 1; - - /* We only write mask1 since mask0 is always all ones by default. */ - wrmsrl(MSR_IA32_PSR_L3_MASK(1), (1ull << info->cbm_len) - 1); - - rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); - wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, val | (1 << PSR_L3_QOS_CDP_ENABLE_BIT)); - - /* Cut half of cos_max when CDP is enabled. */ - info->cos_max >>= 1; - - set_bit(socket, cdp_socket_enable); - } - printk(XENLOG_INFO "CAT: enabled on socket %u, cos_max:%u, cbm_len:%u, CDP:%s\n", - socket, info->cos_max, info->cbm_len, - cdp_is_enabled(socket) ? "on" : "off"); - } -} - -static void cat_cpu_fini(unsigned int cpu) -{ - unsigned int socket = cpu_to_socket(cpu); - - if ( !socket_cpumask[socket] || cpumask_empty(socket_cpumask[socket]) ) - { - struct psr_cat_socket_info *info = cat_socket_info + socket; - - if ( info->cos_to_cbm ) - { - xfree(info->cos_to_cbm); - info->cos_to_cbm = NULL; - } - - if ( cdp_is_enabled(socket) ) - clear_bit(socket, cdp_socket_enable); - - clear_bit(socket, cat_socket_enable); - } -} - -static void __init psr_cat_free(void) -{ - xfree(cat_socket_enable); - cat_socket_enable = NULL; - xfree(cat_socket_info); - cat_socket_info = NULL; -} - -static void __init init_psr_cat(void) -{ - if ( opt_cos_max < 1 ) - { - printk(XENLOG_INFO "CAT: disabled, cos_max is too small\n"); - return; - } - - cat_socket_enable = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_sockets)); - cat_socket_info = xzalloc_array(struct psr_cat_socket_info, nr_sockets); - cdp_socket_enable = xzalloc_array(unsigned long, BITS_TO_LONGS(nr_sockets)); - - if ( !cat_socket_enable || !cat_socket_info ) - psr_cat_free(); } static int psr_cpu_prepare(unsigned int cpu) { - return cat_cpu_prepare(cpu); + return 0; } static void psr_cpu_init(void) { - if ( cat_socket_info ) - cat_cpu_init(); - psr_assoc_init(); } static void psr_cpu_fini(unsigned int cpu) { - if ( cat_socket_info ) - cat_cpu_fini(cpu); + return; } static int cpu_callback( @@ -738,14 +282,10 @@ static int __init psr_presmp_init(void) if ( (opt_psr & PSR_CMT) && opt_rmid_max ) init_psr_cmt(opt_rmid_max); - if ( opt_psr & PSR_CAT ) - init_psr_cat(); - - if ( psr_cpu_prepare(0) ) - psr_cat_free(); + psr_cpu_prepare(0); psr_cpu_init(); - if ( psr_cmt_enabled() || cat_socket_info ) + if ( psr_cmt_enabled() ) register_cpu_notifier(&cpu_nfb); return 0;