From patchwork Sat Apr 1 13:53:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Sun X-Patchwork-Id: 9657947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A5E2360349 for ; Sat, 1 Apr 2017 13:56:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9CE4D285C2 for ; Sat, 1 Apr 2017 13:56:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9193828610; Sat, 1 Apr 2017 13:56:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1A7E4285C2 for ; Sat, 1 Apr 2017 13:56:05 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cuJTV-0005ZJ-0b; Sat, 01 Apr 2017 13:53:53 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1cuJTT-0005YB-Qr for xen-devel@lists.xenproject.org; Sat, 01 Apr 2017 13:53:51 +0000 Received: from [85.158.137.68] by server-4.bemta-3.messagelabs.com id 39/C7-03705-FE0BFD85; Sat, 01 Apr 2017 13:53:51 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrNLMWRWlGSWpSXmKPExsXS1tYhovtuw/0 Igz/n1Cy+b5nM5MDocfjDFZYAxijWzLyk/IoE1oydp4+wFyxQq1iweCZLA+Nk2S5GLg4WgVtM Ej83TGPrYuTkEBKYxijR18cEYksI8EocWTaDFcL2l/h2ZzYjRE29xPLtr9lBbDYBdYnHX3vA6 kUElCTurZrMBDKUWWAnk8S609+ZQRLCAikSV3dPArNZBFQl7tw6AdbAK+Ahse7+RkaIBXISJ4 9NBlvGKeApceXFPhaIZR4SqyZdYp7AyLeAkWEVo0ZxalFZapGuoYVeUlFmekZJbmJmjq6hgbF ebmpxcWJ6ak5iUrFecn7uJkZgoNQzMDDuYPx92vMQoyQHk5Io7/fiexFCfEn5KZUZicUZ8UWl OanFhxhlODiUJHgVgIEnJFiUmp5akZaZAwxZmLQEB4+SCO+x9UBp3uKCxNzizHSI1ClGRSlx3 mcgCQGQREZpHlwbLE4uMcpKCfMyMjAwCPEUpBblZpagyr9iFOdgVBLmlQeZwpOZVwI3/RXQYi agxRZf74IsLklESEk1MDKqi39J5/UU35Gy+4R18vbFfGt1dC7+m/FP9ojxxB9cW95d5fBZnLf UQ3Sygwf/21iGQzMlI7j3V5lc6LZee7i4ILqdd+WvZboXnrVrVlSIb0vZVLjl8aqkIM55X6/p mva8ZWdoXGnepi024ertuYdzZKo8NUKqH3/6XeiuMNNr5k6GPt78WUosxRmJhlrMRcWJAIMjz yGOAgAA X-Env-Sender: yi.y.sun@linux.intel.com X-Msg-Ref: server-9.tower-31.messagelabs.com!1491054811!37933881!7 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 51304 invoked from network); 1 Apr 2017 13:53:50 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-9.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 1 Apr 2017 13:53:50 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491054830; x=1522590830; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=l+V1uH1qMYRYuDzCqeMnqpcWxERMpbzcOrYr1lML1+E=; b=rxhbPxv1U/4AdxukyJJkJgZyXZf+52zmiO5smQZpB6fi9rmq0p10MNJh iQJuWr6t0AdLPjEwjnInId3Fj2MkVw==; Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Apr 2017 06:53:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,258,1486454400"; d="scan'208";a="950544598" Received: from yisun1-ubuntu.bj.intel.com ([10.238.156.112]) by orsmga003.jf.intel.com with ESMTP; 01 Apr 2017 06:53:46 -0700 From: Yi Sun To: xen-devel@lists.xenproject.org Date: Sat, 1 Apr 2017 21:53:37 +0800 Message-Id: <1491054836-30488-7-git-send-email-yi.y.sun@linux.intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1491054836-30488-1-git-send-email-yi.y.sun@linux.intel.com> References: <1491054836-30488-1-git-send-email-yi.y.sun@linux.intel.com> Cc: kevin.tian@intel.com, wei.liu2@citrix.com, andrew.cooper3@citrix.com, dario.faggioli@citrix.com, he.chen@linux.intel.com, ian.jackson@eu.citrix.com, Yi Sun , mengxu@cis.upenn.edu, jbeulich@suse.com, chao.p.peng@linux.intel.com, roger.pau@citrix.com Subject: [Xen-devel] [PATCH v10 06/25] x86: refactor psr: L3 CAT: implement Domain init/free and schedule flows. X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch implements the Domain init/free and schedule flows. - When domain init, its psr resource should be allocated. - When domain free, its psr resource should be freed too. - When domain is scheduled, its COS ID on the socket should be set into ASSOC register to make corresponding COS MSR value work. Signed-off-by: Yi Sun --- v10: - remove 'cat_get_cos_max' as 'cos_max' is a feature property now which can be directly used. (suggested by Jan Beulich) - replace 'info->feat_mask' check to 'feat_init_done'. (suggested by Jan Beulich) v9: - rename 'l3_cat_get_cos_max' to 'cat_get_cos_max' to cover all CAT/CDP features. (suggested by Roger Pau) - replace feature list handling to feature array handling. (suggested by Roger Pau) - implement 'psr_alloc_cos' to match 'psr_free_cos'. (suggested by Wei Liu) - use 'psr_alloc_feat_enabled'. (suggested by Wei Liu) - fix coding style issue. (suggested by Wei Liu) - remove 'inline'. (suggested by Jan Beulich) - modify patch title to indicate 'L3 CAT'. (suggested by Jan Beulich) - remove 'psr_cos_ids' check in 'psr_free_cos'. (suggested by Jan Beulich) v6: - change 'PSR_ASSOC_REG_POS' to 'PSR_ASSOC_REG_SHIFT'. (suggested by Konrad Rzeszutek Wilk) v5: - rename 'feat_tmp' to 'feat'. (suggested by Jan Beulich) - define 'PSR_ASSOC_REG_POS'. (suggested by Jan Beulich) v4: - create this patch to make codes easier to understand. (suggested by Jan Beulich) --- xen/arch/x86/psr.c | 71 +++++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 68 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index e422a23..3421219 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -49,6 +49,8 @@ */ #define MAX_COS_REG_CNT 128 +#define PSR_ASSOC_REG_SHIFT 32 + enum psr_feat_type { PSR_SOCKET_L3_CAT, PSR_SOCKET_L3_CDP, @@ -376,11 +378,39 @@ void psr_free_rmid(struct domain *d) d->arch.psr_rmid = 0; } -static inline void psr_assoc_init(void) +static unsigned int get_max_cos_max(const struct psr_socket_info *info) +{ + const struct feat_node *feat; + unsigned int cos_max = 0, i; + + for ( i = 0; i < PSR_SOCKET_MAX_FEAT; i++ ) + { + feat = info->features[i]; + if ( !feat ) + continue; + + cos_max = max(feat->props->cos_max, cos_max); + } + + return cos_max; +} + +static void psr_assoc_init(void) { struct psr_assoc *psra = &this_cpu(psr_assoc); - if ( psr_cmt_enabled() ) + if ( psr_alloc_feat_enabled() ) + { + unsigned int socket = cpu_to_socket(smp_processor_id()); + const struct psr_socket_info *info = socket_info + socket; + unsigned int cos_max = get_max_cos_max(info); + + if ( feat_init_done(info) ) + psra->cos_mask = ((1ull << get_count_order(cos_max)) - 1) << + PSR_ASSOC_REG_SHIFT; + } + + if ( psr_cmt_enabled() || psra->cos_mask ) rdmsrl(MSR_IA32_PSR_ASSOC, psra->val); } @@ -389,6 +419,13 @@ static inline void psr_assoc_rmid(uint64_t *reg, unsigned int rmid) *reg = (*reg & ~rmid_mask) | (rmid & rmid_mask); } +static void psr_assoc_cos(uint64_t *reg, unsigned int cos, + uint64_t cos_mask) +{ + *reg = (*reg & ~cos_mask) | + (((uint64_t)cos << PSR_ASSOC_REG_SHIFT) & cos_mask); +} + void psr_ctxt_switch_to(struct domain *d) { struct psr_assoc *psra = &this_cpu(psr_assoc); @@ -397,6 +434,11 @@ void psr_ctxt_switch_to(struct domain *d) if ( psr_cmt_enabled() ) psr_assoc_rmid(®, d->arch.psr_rmid); + if ( psra->cos_mask ) + psr_assoc_cos(®, d->arch.psr_cos_ids ? + d->arch.psr_cos_ids[cpu_to_socket(smp_processor_id())] : + 0, psra->cos_mask); + if ( reg != psra->val ) { wrmsrl(MSR_IA32_PSR_ASSOC, reg); @@ -422,14 +464,37 @@ int psr_set_l3_cbm(struct domain *d, unsigned int socket, return 0; } -int psr_domain_init(struct domain *d) +/* Called with domain lock held, no extra lock needed for 'psr_cos_ids' */ +static void psr_free_cos(struct domain *d) +{ + xfree(d->arch.psr_cos_ids); + d->arch.psr_cos_ids = NULL; +} + +static int psr_alloc_cos(struct domain *d) { + d->arch.psr_cos_ids = xzalloc_array(unsigned int, nr_sockets); + if ( !d->arch.psr_cos_ids ) + return -ENOMEM; + return 0; } +int psr_domain_init(struct domain *d) +{ + /* Init to success value */ + int ret = 0; + + if ( psr_alloc_feat_enabled() ) + ret = psr_alloc_cos(d); + + return ret; +} + void psr_domain_free(struct domain *d) { psr_free_rmid(d); + psr_free_cos(d); } static void __init init_psr(void)