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Thu, 22 Jun 2017 19:25:31 +0300 From: Volodymyr Babchuk To: xen-devel@lists.xen.org Date: Thu, 22 Jun 2017 19:25:00 +0300 Message-Id: <1498148700-10758-5-git-send-email-volodymyr_babchuk@epam.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1498148700-10758-1-git-send-email-volodymyr_babchuk@epam.com> References: <1497449445-23112-1-git-send-email-volodymyr_babchuk@epam.com> <1498148700-10758-1-git-send-email-volodymyr_babchuk@epam.com> MIME-Version: 1.0 X-Originating-IP: [85.223.209.58] X-ClientProxiedBy: VI1PR0601CA0023.eurprd06.prod.outlook.com (2603:10a6:800:1e::33) To AM5PR03MB3090.eurprd03.prod.outlook.com (2603:10a6:206:19::27) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 51f039d1-7c12-4b6b-a1ca-08d4b98b4f10 X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500055)(300135000095)(300000501055)(300135300095)(22001)(300000502055)(300135100095)(300000503055)(300135400095)(201703131423075)(201703031133081)(300000504055)(300135200095)(300000505055)(300135600095)(300000506048)(300135500095); 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It does not needed anymore, because: - Generic handler checks that 64 bit calls can be made only by 64 bit guests. - SMCCC requires that 64-bit handler should support both 32 and 64 bit calls even if they originate from 64 bit caller. This patch removes that extra check. Signed-off-by: Volodymyr Babchuk Reviewed-by: Stefano Stabellini --- xen/arch/arm/vsmc.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/xen/arch/arm/vsmc.c b/xen/arch/arm/vsmc.c index 5f10fd1..1983e0e 100644 --- a/xen/arch/arm/vsmc.c +++ b/xen/arch/arm/vsmc.c @@ -98,12 +98,6 @@ static bool handle_arch(struct cpu_user_regs *regs) return false; } -/* helper function for checking arm mode 32/64 bit */ -static inline int psci_mode_check(struct domain *d, register_t fid) -{ - return !( is_64bit_domain(d)^( (fid & PSCI_0_2_64BIT) >> 30 ) ); -} - /* PSCI 2.0 interface */ static bool handle_ssc(struct cpu_user_regs *regs) { @@ -125,8 +119,7 @@ static bool handle_ssc(struct cpu_user_regs *regs) return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_MIGRATE_INFO_UP_CPU): perfc_incr(vpsci_migrate_info_up_cpu); - if ( psci_mode_check(current->domain, fid) ) - set_user_reg(regs, 0, do_psci_0_2_migrate_info_up_cpu()); + set_user_reg(regs, 0, do_psci_0_2_migrate_info_up_cpu()); return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_SYSTEM_OFF): perfc_incr(vpsci_system_off); @@ -140,7 +133,6 @@ static bool handle_ssc(struct cpu_user_regs *regs) return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_CPU_ON): perfc_incr(vpsci_cpu_on); - if ( psci_mode_check(current->domain, fid) ) { register_t vcpuid = get_user_reg(regs, 1); register_t epoint = get_user_reg(regs, 2); @@ -151,7 +143,6 @@ static bool handle_ssc(struct cpu_user_regs *regs) return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_CPU_SUSPEND): perfc_incr(vpsci_cpu_suspend); - if ( psci_mode_check(current->domain, fid) ) { uint32_t pstate = get_user_reg(regs, 1); register_t epoint = get_user_reg(regs, 2); @@ -162,7 +153,6 @@ static bool handle_ssc(struct cpu_user_regs *regs) return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_AFFINITY_INFO): perfc_incr(vpsci_cpu_affinity_info); - if ( psci_mode_check(current->domain, fid) ) { register_t taff = get_user_reg(regs, 1); uint32_t laff = get_user_reg(regs,2); @@ -172,7 +162,6 @@ static bool handle_ssc(struct cpu_user_regs *regs) return true; case ARM_SMCCC_FUNC_NUM(PSCI_0_2_FN_MIGRATE): perfc_incr(vpsci_cpu_migrate); - if ( psci_mode_check(current->domain, fid) ) { uint32_t tcpu = get_user_reg(regs, 1); set_user_reg(regs, 0, do_psci_0_2_migrate(tcpu));