@@ -319,6 +319,27 @@ static inline int pit_channel0_enabled(void)
return pt_active(¤t->domain->arch.vpit.pt0);
}
+int vioapic_pin_vector(struct hvm_vioapic *vioapic, unsigned int pin)
+{
+ struct IO_APIC_route_remap_entry rte = { { vioapic->redirtbl[pin].bits } };
+
+ if ( rte.format )
+ {
+ int err;
+ struct irq_remapping_request request;
+ struct irq_remapping_info info;
+
+ irq_request_ioapic_fill(&request, vioapic->id, rte.val);
+ /* Currently, only viommu 0 is supported */
+ err = viommu_get_irq_info(vioapic->domain, 0, &request, &info);
+ return !err ? info.vector : -1;
+ }
+ else
+ {
+ return vioapic->redirtbl[pin].fields.vector;
+ }
+}
+
static void vioapic_deliver(struct hvm_vioapic *vioapic, unsigned int pin)
{
uint16_t dest = vioapic->redirtbl[pin].fields.dest_id;
@@ -80,6 +80,7 @@ static int pt_irq_vector(struct periodic_time *pt, enum hvm_intsrc src)
struct vcpu *v = pt->vcpu;
struct hvm_vioapic *vioapic;
unsigned int gsi, isa_irq, pin;
+ int vector;
if ( pt->source == PTSRC_lapic )
return pt->irq;
@@ -101,7 +102,15 @@ static int pt_irq_vector(struct periodic_time *pt, enum hvm_intsrc src)
return -1;
}
- return vioapic->redirtbl[pin].fields.vector;
+ vector = vioapic_pin_vector(vioapic, pin);
+ if ( vector < 0 )
+ {
+ gdprintk(XENLOG_ERR, "Can't get interrupt vector from GSI (%u)\n",
+ gsi);
+ domain_crash(v->domain);
+ return -1;
+ }
+ return vector;
}
static int pt_irq_masked(struct periodic_time *pt)
@@ -64,6 +64,7 @@ struct hvm_vioapic {
struct hvm_vioapic *gsi_vioapic(const struct domain *d, unsigned int gsi,
unsigned int *pin);
+int vioapic_pin_vector(struct hvm_vioapic *vioapic, unsigned int pin);
int vioapic_init(struct domain *d);
void vioapic_deinit(struct domain *d);
void vioapic_reset(struct domain *d);