From patchwork Thu Jun 29 05:50:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9816561 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 16D39603D7 for ; Thu, 29 Jun 2017 12:00:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CDE132851A for ; Thu, 29 Jun 2017 12:00:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C213B286CC; Thu, 29 Jun 2017 12:00:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.2 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED,RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 23CFE2853A for ; Thu, 29 Jun 2017 12:00:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dQY5n-0006yk-QF; Thu, 29 Jun 2017 11:58:39 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dQY5m-0006vO-IO for xen-devel@lists.xen.org; Thu, 29 Jun 2017 11:58:38 +0000 Received: from [85.158.139.211] by server-2.bemta-5.messagelabs.com id 8E/7A-01996-D6BE4595; Thu, 29 Jun 2017 11:58:37 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrHLMWRWlGSWpSXmKPExsXS1tYhopv7OiT SYNE8SYslHxezODB6HN39mymAMYo1My8pvyKBNeNgWytTQZNlxexp+Q2M17W6GLk4hASmM0o0 9HWxdDFyckgI8EocWTaDFcIOkFj3eicrRFE7o8Tjo/sZQRJsAuoSJxZPBLNFBKQlrn2+zAhSx CzQwygxcdkjsEnCAn4S/VOOM4HYLAKqEn/nrwOL8wq4Srzae4sNYoOCxJSH75lBbE6geMPNLW BxIQEXiU89O5knMPIuYGRYxahenFpUllqka6qXVJSZnlGSm5iZo2toYKqXm1pcnJiempOYVKy XnJ+7iREYDgxAsIPxS7/zIUZJDiYlUV7D5yGRQnxJ+SmVGYnFGfFFpTmpxYcYZTg4lCR4974C ygkWpaanVqRl5gADEyYtwcGjJMLbB9LKW1yQmFucmQ6ROsWoKCXOWwPSJwCSyCjNg2uDRcMlR lkpYV5GoEOEeApSi3IzS1DlXzGKczAqCfM+fQk0hSczrwRu+iugxUxAi4VngC0uSURISTUwLp 3gIFn/zqdn62KrSWcEpbRPBJkIL/7qsNfIcVaa/7+avi8blz5fc8jCf4/QIzHz2Wc1X6jP/1J c9ijT4Ia05acfRranxH4f37fifMmLgiyh0oRCPre5cyIMm4tnNzhe+G48QSXaRHylzryYhXPT TG75PDrh/0OXR3rK5u9sC9tTWyVmP9RkVGIpzkg01GIuKk4EAAywox6BAgAA X-Env-Sender: tianyu.lan@intel.com X-Msg-Ref: server-6.tower-206.messagelabs.com!1498737515!100433817!1 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 9.4.19; banners=-,-,- X-VirusChecked: Checked Received: (qmail 37989 invoked from network); 29 Jun 2017 11:58:37 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-6.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 29 Jun 2017 11:58:37 -0000 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 29 Jun 2017 04:58:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.40,280,1496127600"; d="scan'208"; a="1166111069" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.74]) by fmsmga001.fm.intel.com with ESMTP; 29 Jun 2017 04:58:33 -0700 From: Lan Tianyu To: xen-devel@lists.xen.org Date: Thu, 29 Jun 2017 01:50:54 -0400 Message-Id: <1498715457-16565-23-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1498715457-16565-1-git-send-email-tianyu.lan@intel.com> References: <1498715457-16565-1-git-send-email-tianyu.lan@intel.com> Cc: Lan Tianyu , andrew.cooper3@citrix.com, kevin.tian@intel.com, jbeulich@suse.com, Chao Gao Subject: [Xen-devel] [PATCH 22/25] x86/vmsi: Hook delivering remapping format msi to guest X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao In two situations, hypervisor delivers a msi to a hvm guest. One is when qemu sends a request to hypervisor through XEN_DMOP_inject_msi. The other is when a physical interrupt arrives and it has been bound to a guest msi. For the former, the msi is routed to common vIOMMU layer if it is in remapping format. For the latter, if the pt irq is bound to a guest remapping msi, a new remapping msi is constructed based on the binding information and routed to common vIOMMU layer. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- xen/arch/x86/hvm/irq.c | 11 ++++++++++ xen/arch/x86/hvm/vmsi.c | 14 ++++++++++-- xen/drivers/passthrough/io.c | 51 +++++++++++++++++++++++++++++++++----------- xen/include/asm-x86/msi.h | 3 +++ 4 files changed, 65 insertions(+), 14 deletions(-) diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 8625584..abe2f77 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -26,6 +26,7 @@ #include #include #include +#include /* Must be called with hvm_domain->irq_lock hold */ static void assert_gsi(struct domain *d, unsigned ioapic_gsi) @@ -298,6 +299,16 @@ int hvm_inject_msi(struct domain *d, uint64_t addr, uint32_t data) >> MSI_DATA_TRIGGER_SHIFT; uint8_t vector = data & MSI_DATA_VECTOR_MASK; + if ( addr & MSI_ADDR_INTEFORMAT_MASK ) + { + struct irq_remapping_request request; + + irq_request_msi_fill(&request, 0, addr, data); + /* Currently, only viommu 0 is supported */ + viommu_handle_irq_request(d, 0, &request); + return 0; + } + if ( !vector ) { int pirq = ((addr >> 32) & 0xffffff00) | dest; diff --git a/xen/arch/x86/hvm/vmsi.c b/xen/arch/x86/hvm/vmsi.c index c4ec0ad..75ceb19 100644 --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -114,9 +114,19 @@ void vmsi_deliver_pirq(struct domain *d, const struct hvm_pirq_dpci *pirq_dpci) "vector=%x trig_mode=%x\n", dest, dest_mode, delivery_mode, vector, trig_mode); - ASSERT(pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI); + ASSERT(pirq_dpci->flags & (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_GUEST_MSI_IR)); + if ( pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI_IR ) + { + struct irq_remapping_request request; - vmsi_deliver(d, vector, dest, dest_mode, delivery_mode, trig_mode); + irq_request_msi_fill(&request, pirq_dpci->gmsi.intremap.source_id, + pirq_dpci->gmsi.intremap.addr, + pirq_dpci->gmsi.intremap.data); + /* Currently, only viommu 0 is supported */ + viommu_handle_irq_request(d, 0, &request); + } + else + vmsi_deliver(d, vector, dest, dest_mode, delivery_mode, trig_mode); } /* Return value, -1 : multi-dests, non-negative value: dest_vcpu_id */ diff --git a/xen/drivers/passthrough/io.c b/xen/drivers/passthrough/io.c index 599f481..39f0a5b 100644 --- a/xen/drivers/passthrough/io.c +++ b/xen/drivers/passthrough/io.c @@ -139,7 +139,9 @@ static void pt_pirq_softirq_reset(struct hvm_pirq_dpci *pirq_dpci) bool_t pt_irq_need_timer(uint32_t flags) { - return !(flags & (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_TRANSLATE)); + return !(flags & (HVM_IRQ_DPCI_GUEST_MSI_IR | + HVM_IRQ_DPCI_GUEST_MSI | + HVM_IRQ_DPCI_TRANSLATE)); } static int pt_irq_guest_eoi(struct domain *d, struct hvm_pirq_dpci *pirq_dpci, @@ -656,7 +658,8 @@ int pt_irq_destroy_bind( pirq = pirq_info(d, machine_gsi); pirq_dpci = pirq_dpci(pirq); - if ( pt_irq_bind->irq_type != PT_IRQ_TYPE_MSI ) + if ( (pt_irq_bind->irq_type != PT_IRQ_TYPE_MSI_IR) && + (pt_irq_bind->irq_type != PT_IRQ_TYPE_MSI) ) { unsigned int bus = pt_irq_bind->u.pci.bus; unsigned int device = pt_irq_bind->u.pci.device; @@ -821,17 +824,39 @@ static int _hvm_dpci_msi_eoi(struct domain *d, { int vector = (long)arg; - if ( (pirq_dpci->flags & HVM_IRQ_DPCI_MACH_MSI) && - (pirq_dpci->gmsi.legacy.gvec == vector) ) + if ( pirq_dpci->flags & HVM_IRQ_DPCI_MACH_MSI ) { - int dest = pirq_dpci->gmsi.legacy.gflags & VMSI_DEST_ID_MASK; - int dest_mode = !!(pirq_dpci->gmsi.legacy.gflags & VMSI_DM_MASK); + if ( (pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI) && + (pirq_dpci->gmsi.legacy.gvec == vector) ) + { + int dest = pirq_dpci->gmsi.legacy.gflags & VMSI_DEST_ID_MASK; + int dest_mode = !!(pirq_dpci->gmsi.legacy.gflags & VMSI_DM_MASK); - if ( vlapic_match_dest(vcpu_vlapic(current), NULL, 0, dest, - dest_mode) ) + if ( vlapic_match_dest(vcpu_vlapic(current), NULL, 0, dest, + dest_mode) ) + { + __msi_pirq_eoi(pirq_dpci); + return 1; + } + } + else if ( pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI_IR ) { - __msi_pirq_eoi(pirq_dpci); - return 1; + int ret; + struct irq_remapping_request request; + struct irq_remapping_info irq_info; + + irq_request_msi_fill(&request, pirq_dpci->gmsi.intremap.source_id, + pirq_dpci->gmsi.intremap.addr, + pirq_dpci->gmsi.intremap.data); + /* Currently, only viommu 0 is supported */ + ret = viommu_get_irq_info(d, 0, &request, &irq_info); + if ( (!ret) && (irq_info.vector == vector) && + vlapic_match_dest(vcpu_vlapic(current), NULL, 0, + irq_info.dest, irq_info.dest_mode) ) + { + __msi_pirq_eoi(pirq_dpci); + return 1; + } } } @@ -866,14 +891,16 @@ static void hvm_dirq_assist(struct domain *d, struct hvm_pirq_dpci *pirq_dpci) { send_guest_pirq(d, pirq); - if ( pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI ) + if ( pirq_dpci->flags & + (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_GUEST_MSI_IR) ) { spin_unlock(&d->event_lock); return; } } - if ( pirq_dpci->flags & HVM_IRQ_DPCI_GUEST_MSI ) + if ( pirq_dpci->flags & + (HVM_IRQ_DPCI_GUEST_MSI | HVM_IRQ_DPCI_GUEST_MSI_IR) ) { vmsi_deliver_pirq(d, pirq_dpci); spin_unlock(&d->event_lock); diff --git a/xen/include/asm-x86/msi.h b/xen/include/asm-x86/msi.h index 213ee53..3391317 100644 --- a/xen/include/asm-x86/msi.h +++ b/xen/include/asm-x86/msi.h @@ -49,6 +49,9 @@ #define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT) #define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT) +#define MSI_ADDR_INTEFORMAT_SHIFT 4 +#define MSI_ADDR_INTEFORMAT_MASK (1 << MSI_ADDR_INTEFORMAT_SHIFT) + #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_ID_MASK 0x00ff000 #define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & MSI_ADDR_DEST_ID_MASK)