From patchwork Wed Aug 9 20:34:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9892657 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7E8F160236 for ; Thu, 10 Aug 2017 02:44:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E9AC27CF9 for ; Thu, 10 Aug 2017 02:44:07 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 737D028437; Thu, 10 Aug 2017 02:44:07 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E6DCB28558 for ; Thu, 10 Aug 2017 02:44:06 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dfdQL-00025B-14; Thu, 10 Aug 2017 02:42:13 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dfdQK-00022m-9l for xen-devel@lists.xen.org; Thu, 10 Aug 2017 02:42:12 +0000 Received: from [85.158.137.68] by server-8.bemta-3.messagelabs.com id 60/0E-02176-308CB895; Thu, 10 Aug 2017 02:42:11 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRWlGSWpSXmKPExsXS1tYhoct0ojv SoPmYscWSj4tZHBg9ju7+zRTAGMWamZeUX5HAmvFl1U3mgneWFa92XmRqYLyk28XIxSEkMI1R YsHTe8xdjJwcEgK8EkeWzWDtYuQAsv0lGrbJQNR0MErsvnKCEaSGTUBd4sTiiWC2iIC0xLXPl 8FsZoFiiY9Hj7OA2MICThJb/jxgB5nDIqAqseWtFkiYV8BV4vL9J+wQqxQkpjx8D7aWEyg+dc tWJhBbSMBFYt3yaYwTGHkXMDKsYtQoTi0qSy3SNbLUSyrKTM8oyU3MzNE1NDDWy00tLk5MT81 JTCrWS87P3cQIDIZ6BgbGHYxNe/0OMUpyMCmJ8nY0dEcK8SXlp1RmJBZnxBeV5qQWH2KU4eBQ kuDtPgaUEyxKTU+tSMvMAYYlTFqCg0dJhLcMJM1bXJCYW5yZDpE6xWjMsWH1+i9MHK8m/P/GJ MSSl5+XKiXOuwSkVACkNKM0D24QLF4uMcpKCfMyMjAwCPEUpBblZpagyr9iFOdgVBLm3QIyhS czrwRu3yugU5iATonw7QQ5pSQRISXVwLg8sCG2t/ZowDWrNauS4/sLJZTV/vn9fbatnEez/aZ 4xsOVVzr1LGfrTf4j+fsC8/aKDUuF3+rtELU/J8Xf7Kgs2370HV916Ab2iGuTpx8xWeCj6DY9 S3mN3aLyBR4iSee5chdGNruKdfoXujyUmP9VwvZYR9Mhg43SZwsCOpUkE7sL2Lb2KbEUZyQaa jEXFScCABjrAgySAgAA X-Env-Sender: tianyu.lan@intel.com X-Msg-Ref: server-6.tower-31.messagelabs.com!1502332928!70801846!1 X-Originating-IP: [134.134.136.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjQgPT4gMzkwOTcx\n X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 20742 invoked from network); 10 Aug 2017 02:42:10 -0000 Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by server-6.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 10 Aug 2017 02:42:10 -0000 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Aug 2017 19:42:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,349,1498546800"; d="scan'208";a="121899003" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.141]) by orsmga002.jf.intel.com with ESMTP; 09 Aug 2017 19:42:06 -0700 From: Lan Tianyu To: xen-devel@lists.xen.org Date: Wed, 9 Aug 2017 16:34:26 -0400 Message-Id: <1502310866-10450-26-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1502310866-10450-1-git-send-email-tianyu.lan@intel.com> References: <1502310866-10450-1-git-send-email-tianyu.lan@intel.com> Cc: Lan Tianyu , kevin.tian@intel.com, julien.grall@arm.com, Chao Gao Subject: [Xen-devel] [PATCH V2 25/25] x86/vvtd: save and restore emulated VT-d X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao Wrap some useful status in a new structure hvm_hw_vvtd, following the customs of vlapic, vioapic and etc. Provide two save-restore pairs to save/restore registers and non-register status. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- xen/drivers/passthrough/vtd/vvtd.c | 98 ++++++++++++++++++++++------------ xen/include/public/arch-x86/hvm/save.h | 24 ++++++++- 2 files changed, 88 insertions(+), 34 deletions(-) diff --git a/xen/drivers/passthrough/vtd/vvtd.c b/xen/drivers/passthrough/vtd/vvtd.c index 4f5e28e..dd6be83 100644 --- a/xen/drivers/passthrough/vtd/vvtd.c +++ b/xen/drivers/passthrough/vtd/vvtd.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include @@ -32,39 +33,26 @@ #include #include #include +#include #include "iommu.h" #include "vtd.h" -struct hvm_hw_vvtd_regs { - uint8_t data[1024]; -}; - /* Status field of struct vvtd */ #define VIOMMU_STATUS_DEFAULT (0) #define VIOMMU_STATUS_IRQ_REMAPPING_ENABLED (1 << 0) #define VIOMMU_STATUS_DMA_REMAPPING_ENABLED (1 << 1) #define vvtd_irq_remapping_enabled(vvtd) \ - (vvtd->status & VIOMMU_STATUS_IRQ_REMAPPING_ENABLED) + (vvtd->hw.status & VIOMMU_STATUS_IRQ_REMAPPING_ENABLED) struct vvtd { - /* VIOMMU_STATUS_XXX */ - int status; - /* Fault Recording index */ - int frcd_idx; /* Address range of remapping hardware register-set */ uint64_t base_addr; uint64_t length; /* Point back to the owner domain */ struct domain *domain; - /* Is in Extended Interrupt Mode? */ - bool eim; - /* Max remapping entries in IRT */ - int irt_max_entry; - /* Interrupt remapping table base gfn */ - uint64_t irt; - + struct hvm_hw_vvtd hw; struct hvm_hw_vvtd_regs *regs; struct page_info *regs_page; }; @@ -370,12 +358,12 @@ static int vvtd_alloc_frcd(struct vvtd *vvtd) int prev; /* Set the F bit to indicate the FRCD is in use. */ - if ( vvtd_test_and_set_bit(vvtd, DMA_FRCD(vvtd->frcd_idx, DMA_FRCD3_OFFSET), + if ( vvtd_test_and_set_bit(vvtd, DMA_FRCD(vvtd->hw.frcd_idx, DMA_FRCD3_OFFSET), DMA_FRCD_F_BIT) ) { - prev = vvtd->frcd_idx; - vvtd->frcd_idx = (prev + 1) % DMA_FRCD_REG_NR; - return vvtd->frcd_idx; + prev = vvtd->hw.frcd_idx; + vvtd->hw.frcd_idx = (prev + 1) % DMA_FRCD_REG_NR; + return vvtd->hw.frcd_idx; } return -1; } @@ -712,12 +700,12 @@ static int vvtd_handle_gcmd_ire(struct vvtd *vvtd, uint32_t val) if ( val & DMA_GCMD_IRE ) { - vvtd->status |= VIOMMU_STATUS_IRQ_REMAPPING_ENABLED; + vvtd->hw.status |= VIOMMU_STATUS_IRQ_REMAPPING_ENABLED; __vvtd_set_bit(vvtd, DMAR_GSTS_REG, DMA_GSTS_IRES_BIT); } else { - vvtd->status |= ~VIOMMU_STATUS_IRQ_REMAPPING_ENABLED; + vvtd->hw.status |= ~VIOMMU_STATUS_IRQ_REMAPPING_ENABLED; __vvtd_clear_bit(vvtd, DMAR_GSTS_REG, DMA_GSTS_IRES_BIT); } @@ -736,11 +724,11 @@ static int vvtd_handle_gcmd_sirtp(struct vvtd *vvtd, uint32_t val) "active." ); vvtd_get_reg_quad(vvtd, DMAR_IRTA_REG, irta); - vvtd->irt = DMA_IRTA_ADDR(irta) >> PAGE_SHIFT; - vvtd->irt_max_entry = DMA_IRTA_SIZE(irta); - vvtd->eim = DMA_IRTA_EIME(irta); + vvtd->hw.irt = DMA_IRTA_ADDR(irta) >> PAGE_SHIFT; + vvtd->hw.irt_max_entry = DMA_IRTA_SIZE(irta); + vvtd->hw.eim = DMA_IRTA_EIME(irta); VVTD_DEBUG(VVTD_DBG_RW, "Update IR info (addr=%lx eim=%d size=%d).", - vvtd->irt, vvtd->eim, vvtd->irt_max_entry); + vvtd->hw.irt, vvtd->hw.eim, vvtd->hw.irt_max_entry); __vvtd_set_bit(vvtd, DMAR_GSTS_REG, DMA_GSTS_SIRTPS_BIT); return X86EMUL_OKAY; @@ -947,13 +935,13 @@ static int vvtd_get_entry(struct vvtd *vvtd, VVTD_DEBUG(VVTD_DBG_TRANS, "interpret a request with index %x", entry); - if ( entry > vvtd->irt_max_entry ) + if ( entry > vvtd->hw.irt_max_entry ) { ret = VTD_FR_IR_INDEX_OVER; goto handle_fault; } - ret = map_guest_page(vvtd->domain, vvtd->irt + (entry >> IREMAP_ENTRY_ORDER), + ret = map_guest_page(vvtd->domain, vvtd->hw.irt + (entry >> IREMAP_ENTRY_ORDER), (void**)&irt_page); if ( ret ) { @@ -1077,6 +1065,49 @@ static int vvtd_get_irq_info(struct domain *d, return 0; } +static int vvtd_load_regs(struct domain *d, hvm_domain_context_t *h) +{ + if ( !domain_vvtd(d) ) + return -ENODEV; + + if ( hvm_load_entry(IOMMU_REGS, h, domain_vvtd(d)->regs) ) + return -EINVAL; + + return 0; +} + +static int vvtd_save_regs(struct domain *d, hvm_domain_context_t *h) +{ + if ( !domain_vvtd(d) ) + return 0; + + return hvm_save_entry(IOMMU_REGS, 0, h, domain_vvtd(d)->regs); +} + +static int vvtd_load_hidden(struct domain *d, hvm_domain_context_t *h) +{ + if ( !domain_vvtd(d) ) + return -ENODEV; + + if ( hvm_load_entry(IOMMU, h, &domain_vvtd(d)->hw) ) + return -EINVAL; + + return 0; +} + +static int vvtd_save_hidden(struct domain *d, hvm_domain_context_t *h) +{ + if ( !domain_vvtd(d) ) + return 0; + + return hvm_save_entry(IOMMU, 0, h, &domain_vvtd(d)->hw); +} + +HVM_REGISTER_SAVE_RESTORE(IOMMU, vvtd_save_hidden, vvtd_load_hidden, + 1, HVMSR_PER_DOM); +HVM_REGISTER_SAVE_RESTORE(IOMMU_REGS, vvtd_save_regs, vvtd_load_regs, + 1, HVMSR_PER_DOM); + static void vvtd_reset(struct vvtd *vvtd, uint64_t capability) { uint64_t cap = DMA_CAP_NFR | DMA_CAP_SLLPS | DMA_CAP_FRO | @@ -1122,12 +1153,13 @@ static int vvtd_create(struct domain *d, struct viommu *viommu) vvtd->base_addr = viommu->base_address; vvtd->length = viommu->length; vvtd->domain = d; - vvtd->status = VIOMMU_STATUS_DEFAULT; - vvtd->eim = 0; - vvtd->irt = 0; - vvtd->irt_max_entry = 0; - vvtd->frcd_idx = 0; + vvtd->hw.status = VIOMMU_STATUS_DEFAULT; + vvtd->hw.eim = 0; + vvtd->hw.irt = 0; + vvtd->hw.irt_max_entry = 0; + vvtd->hw.frcd_idx = 0; register_mmio_handler(d, &vvtd_mmio_ops); + viommu->priv = (void *)vvtd; return 0; out2: diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index fd7bf3f..10536cb 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -639,10 +639,32 @@ struct hvm_msr { #define CPU_MSR_CODE 20 +struct hvm_hw_vvtd_regs { + uint8_t data[1024]; +}; + +DECLARE_HVM_SAVE_TYPE(IOMMU_REGS, 21, struct hvm_hw_vvtd_regs); + +struct hvm_hw_vvtd +{ + /* VIOMMU_STATUS_XXX */ + uint32_t status; + /* Fault Recording index */ + uint32_t frcd_idx; + /* Is in Extended Interrupt Mode? */ + uint32_t eim; + /* Max remapping entries in IRT */ + uint32_t irt_max_entry; + /* Interrupt remapping table base gfn */ + uint64_t irt; +}; + +DECLARE_HVM_SAVE_TYPE(IOMMU, 22, struct hvm_hw_vvtd); + /* * Largest type-code in use */ -#define HVM_SAVE_CODE_MAX 20 +#define HVM_SAVE_CODE_MAX 22 #endif /* __XEN_PUBLIC_HVM_SAVE_X86_H__ */