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Mon, 21 Aug 2017 23:28:57 +0300 From: Volodymyr Babchuk To: xen-devel@lists.xen.org Date: Mon, 21 Aug 2017 23:27:48 +0300 Message-Id: <1503347275-13039-5-git-send-email-volodymyr_babchuk@epam.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1503347275-13039-1-git-send-email-volodymyr_babchuk@epam.com> References: <1503347275-13039-1-git-send-email-volodymyr_babchuk@epam.com> MIME-Version: 1.0 X-Originating-IP: [85.223.209.58] X-ClientProxiedBy: AM5PR0402CA0016.eurprd04.prod.outlook.com (2603:10a6:203:90::26) To VI1PR0301MB2141.eurprd03.prod.outlook.com (2603:10a6:800:26::14) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d02285e6-2588-4e42-f329-08d4e8d3428f X-Microsoft-Antispam: UriScan:; BCL:0; PCL:0; RULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(300000503095)(300135400095)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095); 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Iglesias" , Julien Grall , Stefano Stabellini , Volodymyr Babchuk Subject: [Xen-devel] [PATCH v4 04/11] arm: processor.h: add definition for immediate value mask X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This patch adds definition HSR_XXC_IMM_MASK. It can be used to extract immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64 instructions, as described at ARM ARM (ARM DDI 0487B.a pages D7-2270, D7-2272). Signed-off-by: Volodymyr Babchuk --- xen/include/asm-arm/processor.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 51ce802..89752a7 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -580,6 +580,9 @@ union hsr { HSR_SYSREG_CRN_MASK|HSR_SYSREG_CRM_MASK|\ HSR_SYSREG_OP2_MASK) +/* HSR.EC == HSR_{HVC32, HVC64, SMC64, SVC32, SVC64} */ +#define HSR_XXC_IMM_MASK (0xffff) + /* Physical Address Register */ #define PAR_F (_AC(1,U)<<0)