From patchwork Fri Sep 22 03:01:56 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "lan,Tianyu" X-Patchwork-Id: 9965591 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id C5D1A600C5 for ; Fri, 22 Sep 2017 09:12:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF45328501 for ; Fri, 22 Sep 2017 09:12:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B3F9E28517; Fri, 22 Sep 2017 09:12:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00, DATE_IN_PAST_06_12, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 964E328757 for ; Fri, 22 Sep 2017 09:12:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dvJyf-0004Nn-2S; Fri, 22 Sep 2017 09:10:29 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dvJyd-0004LV-KO for xen-devel@lists.xen.org; Fri, 22 Sep 2017 09:10:27 +0000 Received: from [85.158.137.68] by server-16.bemta-3.messagelabs.com id 5E/4A-01778-283D4C95; Fri, 22 Sep 2017 09:10:26 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRWlGSWpSXmKPExsXS1tYhr1t/+Ui kwfuTHBZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8bM/hVsBdvDKp6t7WdpYOx26GLk5BASqJRY smkBM4gtIcArcWTZDFYI21/i4ZqNbF2MXEA1HYwS/1YsYgRJsAmoS5xYPBHMFhGQlrj2+TIjS BGzwGYmiblrZrGAJIQF3CXeXzsLNpVFQFVi8ovNYHFeAVeJT3POs0FsUJCY8vA9WA0nUPxX33 YmiItcJFqX7meawMi7gJFhFaN6cWpRWWqRrqFeUlFmekZJbmJmjq6hgbFebmpxcWJ6ak5iUrF ecn7uJkZgODAAwQ7G5R+dDjFKcjApifK+P38kUogvKT+lMiOxOCO+qDQntfgQowwHh5IEr98l oJxgUWp6akVaZg4wMGHSEhw8SiK8iSBp3uKCxNzizHSI1ClGXY6Om3f/MAmx5OXnpUqJ8+qBF AmAFGWU5sGNgEXJJUZZKWFeRqCjhHgKUotyM0tQ5V8xinMwKgnzZoNM4cnMK4Hb9AroCCagI8 pXgx1RkoiQkmpgDLIxi0jO156meGDCvd+2j/vm/vOdYH7QWlvxksl71z4+TY+3ai0/ouQXTJs snjq7iHtrwa/Xm7a2VnpVXT76c+7utlDRadf2fdp/9lt5z4Wzz2dmPt+sdqbm3yaLXZfnC4RN ZVhz3ULEL/vpzruBDgyzZ8VP9OAIjZepKGv0Kjg3Y4nKCZZV+5RYijMSDbWYi4oTAaEbXj2NA gAA X-Env-Sender: tianyu.lan@intel.com X-Msg-Ref: server-14.tower-31.messagelabs.com!1506071420!115859819!1 X-Originating-IP: [134.134.136.31] X-SpamReason: No, hits=1.3 required=7.0 tests=BODY_RANDOM_LONG, DATE_IN_PAST_06_12 X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 34889 invoked from network); 22 Sep 2017 09:10:22 -0000 Received: from mga06.intel.com (HELO mga06.intel.com) (134.134.136.31) by server-14.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 22 Sep 2017 09:10:22 -0000 Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP; 22 Sep 2017 02:10:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,427,1500966000"; d="scan'208";a="902849737" Received: from sky-ws.sh.intel.com (HELO localhost) ([10.239.48.141]) by FMSMGA003.fm.intel.com with ESMTP; 22 Sep 2017 02:10:17 -0700 From: Lan Tianyu To: xen-devel@lists.xen.org Date: Thu, 21 Sep 2017 23:01:56 -0400 Message-Id: <1506049330-11196-16-git-send-email-tianyu.lan@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1506049330-11196-1-git-send-email-tianyu.lan@intel.com> References: <1506049330-11196-1-git-send-email-tianyu.lan@intel.com> Cc: Lan Tianyu , kevin.tian@intel.com, sstabellini@kernel.org, wei.liu2@citrix.com, George.Dunlap@eu.citrix.com, andrew.cooper3@citrix.com, ian.jackson@eu.citrix.com, tim@xen.org, jbeulich@suse.com, roger.pau@citrix.com, Chao Gao Subject: [Xen-devel] [PATCH V3 15/29] x86/vvtd: Process interrupt remapping request X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chao Gao When a remapping interrupt request arrives, remapping hardware computes the interrupt_index per the algorithm described in VTD spec "Interrupt Remapping Table", interprets the IRTE and generates a remapped interrupt request. This patch introduces viommu_handle_irq_request() to emulate the process how remapping hardware handles a remapping interrupt request. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- v3: - Encode map_guest_page()'s error into void* to avoid using another parameter --- xen/drivers/passthrough/vtd/iommu.h | 21 +++ xen/drivers/passthrough/vtd/vvtd.c | 264 +++++++++++++++++++++++++++++++++++- 2 files changed, 284 insertions(+), 1 deletion(-) diff --git a/xen/drivers/passthrough/vtd/iommu.h b/xen/drivers/passthrough/vtd/iommu.h index 703726f..790384f 100644 --- a/xen/drivers/passthrough/vtd/iommu.h +++ b/xen/drivers/passthrough/vtd/iommu.h @@ -218,6 +218,21 @@ #define dma_frcd_source_id(c) (c & 0xffff) #define dma_frcd_page_addr(d) (d & (((u64)-1) << 12)) /* low 64 bit */ +enum VTD_FAULT_TYPE +{ + /* Interrupt remapping transition faults */ + VTD_FR_IR_REQ_RSVD = 0x20, /* One or more IR request reserved + * fields set */ + VTD_FR_IR_INDEX_OVER = 0x21, /* Index value greater than max */ + VTD_FR_IR_ENTRY_P = 0x22, /* Present (P) not set in IRTE */ + VTD_FR_IR_ROOT_INVAL = 0x23, /* IR Root table invalid */ + VTD_FR_IR_IRTE_RSVD = 0x24, /* IRTE Rsvd field non-zero with + * Present flag set */ + VTD_FR_IR_REQ_COMPAT = 0x25, /* Encountered compatible IR + * request while disabled */ + VTD_FR_IR_SID_ERR = 0x26, /* Invalid Source-ID */ +}; + /* * 0: Present * 1-11: Reserved @@ -358,6 +373,12 @@ struct iremap_entry { }; /* + * When VT-d doesn't enable Extended Interrupt Mode. Hardware only interprets + * only 8-bits ([15:8]) of Destination-ID field in the IRTEs. + */ +#define IRTE_xAPIC_DEST_MASK 0xff00 + +/* * Posted-interrupt descriptor address is 64 bits with 64-byte aligned, only * the upper 26 bits of lest significiant 32 bits is available. */ diff --git a/xen/drivers/passthrough/vtd/vvtd.c b/xen/drivers/passthrough/vtd/vvtd.c index a0f63e9..90c00f5 100644 --- a/xen/drivers/passthrough/vtd/vvtd.c +++ b/xen/drivers/passthrough/vtd/vvtd.c @@ -23,11 +23,17 @@ #include #include #include +#include #include +#include #include +#include #include +#include +#include #include "iommu.h" +#include "vtd.h" /* Supported capabilities by vvtd */ unsigned int vvtd_caps = VIOMMU_CAP_IRQ_REMAPPING; @@ -111,6 +117,132 @@ static inline uint64_t vvtd_get_reg_quad(struct vvtd *vtd, uint32_t reg) return vtd->regs->data64[reg/sizeof(uint64_t)]; } +static void* map_guest_page(struct domain *d, uint64_t gfn) +{ + struct page_info *p; + void *ret; + + p = get_page_from_gfn(d, gfn, NULL, P2M_ALLOC); + if ( !p ) + return ERR_PTR(-EINVAL); + + if ( !get_page_type(p, PGT_writable_page) ) + { + put_page(p); + return ERR_PTR(-EINVAL); + } + + ret = __map_domain_page_global(p); + if ( !ret ) + { + put_page_and_type(p); + return ERR_PTR(-ENOMEM); + } + + return ret; +} + +static void unmap_guest_page(void *virt) +{ + struct page_info *page; + + ASSERT((unsigned long)virt & PAGE_MASK); + page = mfn_to_page(domain_page_map_to_mfn(virt)); + + unmap_domain_page_global(virt); + put_page_and_type(page); +} + +static void vvtd_inj_irq(struct vlapic *target, uint8_t vector, + uint8_t trig_mode, uint8_t delivery_mode) +{ + vvtd_debug("dest=v%d, delivery_mode=%x vector=%d trig_mode=%d\n", + vlapic_vcpu(target)->vcpu_id, delivery_mode, vector, trig_mode); + + ASSERT((delivery_mode == dest_Fixed) || + (delivery_mode == dest_LowestPrio)); + + vlapic_set_irq(target, vector, trig_mode); +} + +static int vvtd_delivery(struct domain *d, uint8_t vector, + uint32_t dest, uint8_t dest_mode, + uint8_t delivery_mode, uint8_t trig_mode) +{ + struct vlapic *target; + struct vcpu *v; + + switch ( delivery_mode ) + { + case dest_LowestPrio: + target = vlapic_lowest_prio(d, NULL, 0, dest, dest_mode); + if ( target != NULL ) + { + vvtd_inj_irq(target, vector, trig_mode, delivery_mode); + break; + } + vvtd_debug("null round robin: vector=%02x\n", vector); + break; + + case dest_Fixed: + for_each_vcpu ( d, v ) + if ( vlapic_match_dest(vcpu_vlapic(v), NULL, 0, dest, dest_mode) ) + vvtd_inj_irq(vcpu_vlapic(v), vector, trig_mode, delivery_mode); + break; + + case dest_NMI: + for_each_vcpu ( d, v ) + if ( vlapic_match_dest(vcpu_vlapic(v), NULL, 0, dest, dest_mode) && + !test_and_set_bool(v->nmi_pending) ) + vcpu_kick(v); + break; + + default: + gdprintk(XENLOG_WARNING, "Unsupported VTD delivery mode %d\n", + delivery_mode); + return -EINVAL; + } + + return 0; +} + +static uint32_t irq_remapping_request_index( + const struct arch_irq_remapping_request *irq) +{ + if ( irq->type == VIOMMU_REQUEST_IRQ_MSI ) + { + uint32_t index; + struct msi_msg_remap_entry msi_msg = + { + .address_lo = { .val = irq->msg.msi.addr }, + .data = irq->msg.msi.data, + }; + + index = (msi_msg.address_lo.index_15 << 15) + + msi_msg.address_lo.index_0_14; + if ( msi_msg.address_lo.SHV ) + index += (uint16_t)msi_msg.data; + + return index; + } + else if ( irq->type == VIOMMU_REQUEST_IRQ_APIC ) + { + struct IO_APIC_route_remap_entry remap_rte = { .val = irq->msg.rte }; + + return (remap_rte.index_15 << 15) + remap_rte.index_0_14; + } + ASSERT_UNREACHABLE(); + + return 0; +} + +static inline uint32_t irte_dest(struct vvtd *vvtd, uint32_t dest) +{ + /* In xAPIC mode, only 8-bits([15:8]) are valid */ + return vvtd->status.eim_enabled ? dest : + MASK_EXTR(dest, IRTE_xAPIC_DEST_MASK); +} + static void vvtd_handle_gcmd_ire(struct vvtd *vvtd, uint32_t val) { vvtd_info("%sable Interrupt Remapping", @@ -255,6 +387,135 @@ static const struct hvm_mmio_ops vvtd_mmio_ops = { .write = vvtd_write }; +static void vvtd_handle_fault(struct vvtd *vvtd, + struct arch_irq_remapping_request *irq, + struct iremap_entry *irte, + unsigned int fault, + bool record_fault) +{ + if ( !record_fault ) + return; + + switch ( fault ) + { + case VTD_FR_IR_SID_ERR: + case VTD_FR_IR_IRTE_RSVD: + case VTD_FR_IR_ENTRY_P: + if ( qinval_fault_disable(*irte) ) + break; + /* fall through */ + case VTD_FR_IR_INDEX_OVER: + case VTD_FR_IR_ROOT_INVAL: + /* TODO: handle fault (e.g. record and report this fault to VM */ + break; + + default: + gdprintk(XENLOG_INFO, "Can't handle VT-d fault %x\n", fault); + } + return; +} + +static bool vvtd_irq_request_sanity_check(const struct vvtd *vvtd, + struct arch_irq_remapping_request *irq) +{ + if ( irq->type == VIOMMU_REQUEST_IRQ_APIC ) + { + struct IO_APIC_route_remap_entry rte = { .val = irq->msg.rte }; + + ASSERT(rte.format); + return !!rte.reserved; + } + else if ( irq->type == VIOMMU_REQUEST_IRQ_MSI ) + { + struct msi_msg_remap_entry msi_msg = + { .address_lo = { .val = irq->msg.msi.addr } }; + + ASSERT(msi_msg.address_lo.format); + return 0; + } + ASSERT_UNREACHABLE(); + + return 0; +} + +/* + * 'record_fault' is a flag to indicate whether we need recording a fault + * and notifying guest when a fault happens during fetching vIRTE. + */ +static int vvtd_get_entry(struct vvtd *vvtd, + struct arch_irq_remapping_request *irq, + struct iremap_entry *dest, + bool record_fault) +{ + uint32_t entry = irq_remapping_request_index(irq); + struct iremap_entry *irte, *irt_page; + + vvtd_debug("interpret a request with index %x\n", entry); + + if ( vvtd_irq_request_sanity_check(vvtd, irq) ) + { + vvtd_handle_fault(vvtd, irq, NULL, VTD_FR_IR_REQ_RSVD, record_fault); + return -EINVAL; + } + + if ( entry > vvtd->status.irt_max_entry ) + { + vvtd_handle_fault(vvtd, irq, NULL, VTD_FR_IR_INDEX_OVER, record_fault); + return -EACCES; + } + + irt_page = map_guest_page(vvtd->domain, + vvtd->status.irt + (entry >> IREMAP_ENTRY_ORDER)); + if ( IS_ERR(irt_page) ) + { + vvtd_handle_fault(vvtd, irq, NULL, VTD_FR_IR_ROOT_INVAL, record_fault); + return PTR_ERR(irt_page); + } + + irte = irt_page + (entry % (1 << IREMAP_ENTRY_ORDER)); + dest->val = irte->val; + if ( !qinval_present(*irte) ) + { + vvtd_handle_fault(vvtd, irq, NULL, VTD_FR_IR_ENTRY_P, record_fault); + unmap_guest_page(irt_page); + return -ENOENT; + } + + /* Check reserved bits */ + if ( (irte->remap.res_1 || irte->remap.res_2 || irte->remap.res_3 || + irte->remap.res_4) ) + { + vvtd_handle_fault(vvtd, irq, NULL, VTD_FR_IR_IRTE_RSVD, record_fault); + unmap_guest_page(irt_page); + return -EINVAL; + } + + /* FIXME: We don't check against the source ID */ + unmap_guest_page(irt_page); + + return 0; +} + +static int vvtd_handle_irq_request(struct domain *d, + struct arch_irq_remapping_request *irq) +{ + struct iremap_entry irte; + int ret; + struct vvtd *vvtd = domain_vvtd(d); + + if ( !vvtd || !vvtd->status.intremap_enabled ) + return -ENODEV; + + ret = vvtd_get_entry(vvtd, irq, &irte, true); + if ( ret ) + return ret; + + return vvtd_delivery(vvtd->domain, irte.remap.vector, + irte_dest(vvtd, irte.remap.dst), + irte.remap.dm, irte.remap.dlm, + irte.remap.tm); +} + static void vvtd_reset(struct vvtd *vvtd, uint64_t capability) { uint64_t cap = cap_set_num_fault_regs(1ULL) | @@ -324,7 +585,8 @@ static int vvtd_destroy(struct viommu *viommu) struct viommu_ops vvtd_hvm_vmx_ops = { .create = vvtd_create, - .destroy = vvtd_destroy + .destroy = vvtd_destroy, + .handle_irq_request = vvtd_handle_irq_request }; static int vvtd_register(void)