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[v7,04/16] x86: a few optimizations to psr codes

Message ID 1507884068-18757-5-git-send-email-yi.y.sun@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Yi Sun Oct. 13, 2017, 8:40 a.m. UTC
This patch refines psr codes:
1. Change type of 'cat_init_feature' to 'bool' to remove the pointless
   returning of error code.
2. Move printk in 'cat_init_feature' to reduce a return path.
3. Define a local variable 'feat_mask' in 'psr_cpu_init' to reduce calling of
   'cpuid_count_leaf()'.
4. Change 'PSR_INFO_IDX_CAT_FLAG' to 'PSR_INFO_IDX_CAT_FLAGS'.

Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
CC: Jan Beulich <jbeulich@suse.com>
CC: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Wei Liu <wei.liu2@citrix.com>
CC: Roger Pau Monné <roger.pau@citrix.com>
CC: Chao Peng <chao.p.peng@linux.intel.com>

v7:
    - adjust the check to 'cat_init_feature' in 'psr_cpu_init'.
      (suggested by Jan Beulich)
    - change 'PSR_INFO_IDX_CAT_FLAG' to 'PSR_INFO_IDX_CAT_FLAGS'.
      (suggested by Jan Beulich)
v6:
    - restore 'write_msr()' type to 'void'.
      (suggested by Jan Beulich and Roger Pau Monné)
    - change 'ebx' in 'psr_cpu_init' to 'feat_mask'.
      (suggested by Jan Beulich and Roger Pau Monné)
v5:
    - create this patch to make codes clearer.
      (suggested by Jan Beulich and Roger Pau Monné)
---
 xen/arch/x86/psr.c        | 45 ++++++++++++++++++++++-----------------------
 xen/arch/x86/sysctl.c     |  4 ++--
 xen/include/asm-x86/psr.h |  2 +-
 3 files changed, 25 insertions(+), 26 deletions(-)
diff mbox

Patch

diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 6dce823..50c5a98 100644
--- a/xen/arch/x86/psr.c
+++ b/xen/arch/x86/psr.c
@@ -273,10 +273,10 @@  static bool psr_check_cbm(unsigned int cbm_len, unsigned long cbm)
 }
 
 /* CAT common functions implementation. */
-static int cat_init_feature(const struct cpuid_leaf *regs,
-                            struct feat_node *feat,
-                            struct psr_socket_info *info,
-                            enum psr_feat_type type)
+static bool cat_init_feature(const struct cpuid_leaf *regs,
+                             struct feat_node *feat,
+                             struct psr_socket_info *info,
+                             enum psr_feat_type type)
 {
     const char *const cat_feat_name[FEAT_TYPE_NUM] = {
         [FEAT_TYPE_L3_CAT] = "L3 CAT",
@@ -286,7 +286,7 @@  static int cat_init_feature(const struct cpuid_leaf *regs,
 
     /* No valid value so do not enable feature. */
     if ( !regs->a || !regs->d )
-        return -ENOENT;
+        return false;
 
     feat->cbm_len = (regs->a & CAT_CBM_LEN_MASK) + 1;
     feat->cos_max = min(opt_cos_max, regs->d & CAT_COS_MAX_MASK);
@@ -296,7 +296,7 @@  static int cat_init_feature(const struct cpuid_leaf *regs,
     case FEAT_TYPE_L3_CAT:
     case FEAT_TYPE_L2_CAT:
         if ( feat->cos_max < 1 )
-            return -ENOENT;
+            return false;
 
         /* We reserve cos=0 as default cbm (all bits within cbm_len are 1). */
         feat->cos_reg_val[0] = cat_default_val(feat->cbm_len);
@@ -313,7 +313,7 @@  static int cat_init_feature(const struct cpuid_leaf *regs,
         uint64_t val;
 
         if ( feat->cos_max < 3 )
-            return -ENOENT;
+            return false;
 
         /* Cut half of cos_max when CDP is enabled. */
         feat->cos_max = (feat->cos_max - 1) >> 1;
@@ -332,20 +332,18 @@  static int cat_init_feature(const struct cpuid_leaf *regs,
     }
 
     default:
-        return -ENOENT;
+        return false;
     }
 
     /* Add this feature into array. */
     info->features[type] = feat;
 
-    if ( !opt_cpu_info )
-        return 0;
-
-    printk(XENLOG_INFO "%s: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
-           cat_feat_name[type], cpu_to_socket(smp_processor_id()),
-           feat->cos_max, feat->cbm_len);
+    if ( opt_cpu_info )
+        printk(XENLOG_INFO "%s: enabled on socket %u, cos_max:%u, cbm_len:%u\n",
+               cat_feat_name[type], cpu_to_socket(smp_processor_id()),
+               feat->cos_max, feat->cbm_len);
 
-    return 0;
+    return true;
 }
 
 static bool cat_get_feat_info(const struct feat_node *feat,
@@ -356,7 +354,7 @@  static bool cat_get_feat_info(const struct feat_node *feat,
 
     data[PSR_INFO_IDX_COS_MAX] = feat->cos_max;
     data[PSR_INFO_IDX_CAT_CBM_LEN] = feat->cbm_len;
-    data[PSR_INFO_IDX_CAT_FLAG] = 0;
+    data[PSR_INFO_IDX_CAT_FLAGS] = 0;
 
     return true;
 }
@@ -383,7 +381,7 @@  static bool l3_cdp_get_feat_info(const struct feat_node *feat,
     if ( !cat_get_feat_info(feat, data, array_len) )
         return false;
 
-    data[PSR_INFO_IDX_CAT_FLAG] |= XEN_SYSCTL_PSR_CAT_L3_CDP;
+    data[PSR_INFO_IDX_CAT_FLAGS] |= XEN_SYSCTL_PSR_CAT_L3_CDP;
 
     return true;
 }
@@ -1413,6 +1411,7 @@  static void psr_cpu_init(void)
     unsigned int socket, cpu = smp_processor_id();
     struct feat_node *feat;
     struct cpuid_leaf regs;
+    uint32_t feat_mask;
 
     if ( !psr_alloc_feat_enabled() || !boot_cpu_has(X86_FEATURE_PQE) )
         goto assoc_init;
@@ -1431,7 +1430,8 @@  static void psr_cpu_init(void)
     spin_lock_init(&info->ref_lock);
 
     cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, &regs);
-    if ( regs.b & PSR_RESOURCE_TYPE_L3 )
+    feat_mask = regs.b;
+    if ( feat_mask & PSR_RESOURCE_TYPE_L3 )
     {
         cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 1, &regs);
 
@@ -1439,27 +1439,26 @@  static void psr_cpu_init(void)
         feat_l3 = NULL;
 
         if ( (regs.c & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) &&
-             !cat_init_feature(&regs, feat, info, FEAT_TYPE_L3_CDP) )
+             cat_init_feature(&regs, feat, info, FEAT_TYPE_L3_CDP) )
             feat_props[FEAT_TYPE_L3_CDP] = &l3_cdp_props;
 
         /* If CDP init fails, try to work as L3 CAT. */
         if ( !feat_props[FEAT_TYPE_L3_CDP] )
         {
-            if ( !cat_init_feature(&regs, feat, info, FEAT_TYPE_L3_CAT) )
+            if ( cat_init_feature(&regs, feat, info, FEAT_TYPE_L3_CAT) )
                 feat_props[FEAT_TYPE_L3_CAT] = &l3_cat_props;
             else
                 feat_l3 = feat;
         }
     }
 
-    cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 0, &regs);
-    if ( regs.b & PSR_RESOURCE_TYPE_L2 )
+    if ( feat_mask & PSR_RESOURCE_TYPE_L2 )
     {
         cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 2, &regs);
 
         feat = feat_l2_cat;
         feat_l2_cat = NULL;
-        if ( !cat_init_feature(&regs, feat, info, FEAT_TYPE_L2_CAT) )
+        if ( cat_init_feature(&regs, feat, info, FEAT_TYPE_L2_CAT) )
             feat_props[FEAT_TYPE_L2_CAT] = &l2_cat_props;
         else
             feat_l2_cat = feat;
diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c
index 6867ee1..6d48cac 100644
--- a/xen/arch/x86/sysctl.c
+++ b/xen/arch/x86/sysctl.c
@@ -188,7 +188,7 @@  long arch_do_sysctl(
             sysctl->u.psr_alloc.u.cat_info.cbm_len =
                                       data[PSR_INFO_IDX_CAT_CBM_LEN];
             sysctl->u.psr_alloc.u.cat_info.flags =
-                                      data[PSR_INFO_IDX_CAT_FLAG];
+                                      data[PSR_INFO_IDX_CAT_FLAGS];
 
             if ( __copy_field_to_guest(u_sysctl, sysctl, u.psr_alloc) )
                 ret = -EFAULT;
@@ -207,7 +207,7 @@  long arch_do_sysctl(
             sysctl->u.psr_alloc.u.cat_info.cbm_len =
                                       data[PSR_INFO_IDX_CAT_CBM_LEN];
             sysctl->u.psr_alloc.u.cat_info.flags =
-                                      data[PSR_INFO_IDX_CAT_FLAG];
+                                      data[PSR_INFO_IDX_CAT_FLAGS];
 
             if ( __copy_field_to_guest(u_sysctl, sysctl, u.psr_alloc) )
                 ret = -EFAULT;
diff --git a/xen/include/asm-x86/psr.h b/xen/include/asm-x86/psr.h
index cb3f067..f151fa7 100644
--- a/xen/include/asm-x86/psr.h
+++ b/xen/include/asm-x86/psr.h
@@ -37,7 +37,7 @@ 
 /* Used by psr_get_info() */
 #define PSR_INFO_IDX_COS_MAX            0
 #define PSR_INFO_IDX_CAT_CBM_LEN        1
-#define PSR_INFO_IDX_CAT_FLAG           2
+#define PSR_INFO_IDX_CAT_FLAGS          2
 #define PSR_INFO_ARRAY_SIZE             3
 
 struct psr_cmt_l3 {