From patchwork Fri Nov 17 06:22:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 10062307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 660496023A for ; Fri, 17 Nov 2017 06:27:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 586032A539 for ; Fri, 17 Nov 2017 06:27:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D1D42A990; Fri, 17 Nov 2017 06:27:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AF5E42A539 for ; Fri, 17 Nov 2017 06:27:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eFa5k-0001Dm-6x; Fri, 17 Nov 2017 06:25:32 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1eFa5i-0001BN-Jd for xen-devel@lists.xen.org; Fri, 17 Nov 2017 06:25:30 +0000 Received: from [85.158.139.211] (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256 bits)) by server-10.bemta-5.messagelabs.com id B9/20-17625-9D08E0A5; Fri, 17 Nov 2017 06:25:29 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRWlGSWpSXmKPExsXS1tYhoXuzgS/ KYMNVKYslHxezODB6HN39mymAMYo1My8pvyKBNWPx3zWsBYvUKnYd7GNuYNwl28XIxSEkMJ1R 4v2Xk2xdjJwcEgK8EkeWzWDtYuQAsgMkmu5rgISFBKok7v+9zQ5iswkoS1z82gtWLiIgLXHt8 2VGkDnMAs+ZJaYc+8kC0iss4CTxclEpSA2LgKrEwpeLmUBsXgFnibcfehkhVilITHn4nhnE5g SK739zkAlil5PEwXXTmCYw8i5gZFjFqFGcWlSWWqRraKqXVJSZnlGSm5iZo2toYKqXm1pcnJi empOYVKyXnJ+7iREYDAxAsIOxYbvnIUZJDiYlUV4ec74oIb6k/JTKjMTijPii0pzU4kOMMhwc ShK8x+qBcoJFqempFWmZOcCwhElLcPAoifAmAkNTiLe4IDG3ODMdInWK0Zjj2czXDcwc0662N jELseTl56VKifPeB5kkAFKaUZoHNwgWL5cYZaWEeRmBThPiKUgtys0sQZV/xSjOwagkzFsJMo UnM68Ebt8roFOYgE6xucENckpJIkJKqoGR+eQVHsNdbamzv4Z4TP556f2rze93+xS8bKzVYmU vvxT6wuPd3k8/uM3VC89LsZ0+mVJgeV9t8beXm4ozl5aZWCveK9t5tl2fyYN9TsD6ifPOuvoc 6Nde+SdwrsLeux9ePp1ScEVk5YSsEL7Dc585XbeY9OPoGoOLOyq7NU8yHGY+vfvl64oIWSWW4 oxEQy3mouJEADB10U2SAgAA X-Env-Sender: chao.gao@intel.com X-Msg-Ref: server-11.tower-206.messagelabs.com!1510899922!87798367!3 X-Originating-IP: [134.134.136.24] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjQgPT4gMzkwOTcx\n X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 52094 invoked from network); 17 Nov 2017 06:25:28 -0000 Received: from mga09.intel.com (HELO mga09.intel.com) (134.134.136.24) by server-11.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Nov 2017 06:25:28 -0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Nov 2017 22:25:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.44,407,1505804400"; d="scan'208"; a="1245165259" Received: from skl-4s-chao.sh.intel.com ([10.239.48.9]) by fmsmga002.fm.intel.com with ESMTP; 16 Nov 2017 22:25:26 -0800 From: Chao Gao To: xen-devel@lists.xen.org Date: Fri, 17 Nov 2017 14:22:24 +0800 Message-Id: <1510899755-40237-18-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1510899755-40237-1-git-send-email-chao.gao@intel.com> References: <1510899755-40237-1-git-send-email-chao.gao@intel.com> Cc: Lan Tianyu , Kevin Tian , Stefano Stabellini , Wei Liu , Konrad Rzeszutek Wilk , George Dunlap , Tim Deegan , Ian Jackson , Jan Beulich , Andrew Cooper , Chao Gao , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [Xen-devel] [PATCH v4 17/28] x86/vvtd: save and restore emulated VT-d X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Provide a save-restore pair to save/restore registers and non-register status. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- v3: - use one entry to save both vvtd registers and other intermediate state --- xen/drivers/passthrough/vtd/vvtd.c | 57 +++++++++++++++++++++++----------- xen/include/public/arch-x86/hvm/save.h | 18 ++++++++++- 2 files changed, 56 insertions(+), 19 deletions(-) diff --git a/xen/drivers/passthrough/vtd/vvtd.c b/xen/drivers/passthrough/vtd/vvtd.c index 81170ec..f6bde69 100644 --- a/xen/drivers/passthrough/vtd/vvtd.c +++ b/xen/drivers/passthrough/vtd/vvtd.c @@ -27,8 +27,10 @@ #include #include #include +#include #include #include +#include #include "iommu.h" #include "vtd.h" @@ -38,20 +40,6 @@ #define VVTD_FRCD_NUM 1ULL #define VVTD_FRCD_START (DMAR_IRTA_REG + 8) -#define VVTD_FRCD_END (VVTD_FRCD_START + VVTD_FRCD_NUM * 16) -#define VVTD_MAX_OFFSET VVTD_FRCD_END - -struct hvm_hw_vvtd { - bool eim_enabled; - bool intremap_enabled; - uint32_t fault_index; - - /* Interrupt remapping table base gfn and the max of entries */ - uint16_t irt_max_entry; - gfn_t irt; - - uint32_t regs[VVTD_MAX_OFFSET/sizeof(uint32_t)]; -}; struct vvtd { /* Base address of remapping hardware register-set */ @@ -776,7 +764,7 @@ static void write_gcmd_sirtp(struct vvtd *vvtd, uint32_t val) if ( vvtd->hw.intremap_enabled ) vvtd_info("Update Interrupt Remapping Table when active\n"); - if ( gfn_x(vvtd->hw.irt) != PFN_DOWN(DMA_IRTA_ADDR(irta)) || + if ( vvtd->hw.irt != PFN_DOWN(DMA_IRTA_ADDR(irta)) || vvtd->hw.irt_max_entry != DMA_IRTA_SIZE(irta) ) { if ( vvtd->irt_base ) @@ -786,14 +774,14 @@ static void write_gcmd_sirtp(struct vvtd *vvtd, uint32_t val) sizeof(struct iremap_entry))); vvtd->irt_base = NULL; } - vvtd->hw.irt = _gfn(PFN_DOWN(DMA_IRTA_ADDR(irta))); + vvtd->hw.irt = PFN_DOWN(DMA_IRTA_ADDR(irta)); vvtd->hw.irt_max_entry = DMA_IRTA_SIZE(irta); vvtd->hw.eim_enabled = !!(irta & IRTA_EIME); vvtd_info("Update IR info (addr=%lx eim=%d size=%d)\n", - gfn_x(vvtd->hw.irt), vvtd->hw.eim_enabled, + vvtd->hw.irt, vvtd->hw.eim_enabled, vvtd->hw.irt_max_entry); - vvtd->irt_base = map_guest_pages(vvtd->domain, gfn_x(vvtd->hw.irt), + vvtd->irt_base = map_guest_pages(vvtd->domain, vvtd->hw.irt, PFN_UP(vvtd->hw.irt_max_entry * sizeof(struct iremap_entry))); } @@ -1138,6 +1126,39 @@ static bool vvtd_is_remapping(const struct domain *d, return !irq_remapping_request_index(irq, &idx); } +static int vvtd_load(struct domain *d, hvm_domain_context_t *h) +{ + struct vvtd *vvtd = domain_vvtd(d); + uint64_t iqa; + + if ( !vvtd ) + return -ENODEV; + + if ( hvm_load_entry(VVTD, h, &vvtd->hw) ) + return -EINVAL; + + iqa = vvtd_get_reg_quad(vvtd, DMAR_IQA_REG); + vvtd->irt_base = map_guest_pages(vvtd->domain, vvtd->hw.irt, + PFN_UP(vvtd->hw.irt_max_entry * + sizeof(struct iremap_entry))); + vvtd->inv_queue_base = map_guest_pages(vvtd->domain, + PFN_DOWN(DMA_IQA_ADDR(iqa)), + 1 << DMA_IQA_QS(iqa)); + return 0; +} + +static int vvtd_save(struct domain *d, hvm_domain_context_t *h) +{ + struct vvtd *vvtd = domain_vvtd(d); + + if ( !vvtd ) + return 0; + + return hvm_save_entry(VVTD, 0, h, &vvtd->hw); +} + +HVM_REGISTER_SAVE_RESTORE(VVTD, vvtd_save, vvtd_load, 1, HVMSR_PER_DOM); + static void vvtd_reset(struct vvtd *vvtd) { uint64_t cap = cap_set_num_fault_regs(VVTD_FRCD_NUM) diff --git a/xen/include/public/arch-x86/hvm/save.h b/xen/include/public/arch-x86/hvm/save.h index fd7bf3f..24a513b 100644 --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -639,10 +639,26 @@ struct hvm_msr { #define CPU_MSR_CODE 20 +#define VVTD_MAX_OFFSET 0xd0 +struct hvm_hw_vvtd +{ + uint32_t eim_enabled : 1, + intremap_enabled : 1; + uint32_t fault_index; + + /* Interrupt remapping table base gfn and the max of entries */ + uint32_t irt_max_entry; + uint64_t irt; + + uint32_t regs[VVTD_MAX_OFFSET/sizeof(uint32_t)]; +}; + +DECLARE_HVM_SAVE_TYPE(VVTD, 21, struct hvm_hw_vvtd); + /* * Largest type-code in use */ -#define HVM_SAVE_CODE_MAX 20 +#define HVM_SAVE_CODE_MAX 21 #endif /* __XEN_PUBLIC_HVM_SAVE_X86_H__ */