From patchwork Mon Apr 8 10:14:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oleksandr Tyshchenko X-Patchwork-Id: 10889241 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1E0B117EF for ; Mon, 8 Apr 2019 10:17:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 05677285A4 for ; Mon, 8 Apr 2019 10:17:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EC154285C9; Mon, 8 Apr 2019 10:17:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 86B1D285A4 for ; Mon, 8 Apr 2019 10:17:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hDRIw-0003pl-Qj; Mon, 08 Apr 2019 10:15:06 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hDRIv-0003np-1G for xen-devel@lists.xenproject.org; Mon, 08 Apr 2019 10:15:05 +0000 X-Inumbo-ID: 2cb6dbfc-59e7-11e9-92d7-bc764e045a96 Received: from mail-lj1-x231.google.com (unknown [2a00:1450:4864:20::231]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTPS id 2cb6dbfc-59e7-11e9-92d7-bc764e045a96; Mon, 08 Apr 2019 10:15:04 +0000 (UTC) Received: by mail-lj1-x231.google.com with SMTP id f23so10726425ljc.0 for ; Mon, 08 Apr 2019 03:15:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g4VY56t8BGvGmnz7boqdc1qWXBW9wwBLZMsTzOiTdoU=; b=GA2YmRkR+F8KBoUnZBodsxhUOyaxGBEvufPFnq4SE7W740lrNHNud97oPSD59c6kfM +w1RpGxv/vmMj/MEl7NlE+5EYjelOGdpSw6qX0Hf2O7qXhBweNlnJhR6AUGT75BWu0MJ kdO0C2h+mhDNDUlnIRHLIiOteM35RU563u2qC5WSuRGL9LvziQD8mGPgpvvA5GebZIxI TSfIDfuUfbjQIXwmGDDQ1bW6bTvUiOTihFkPcLf139us41RAF19hOJiPuHSNTEKof+Md mfKzkQGFcUB9umhyCx6HyyAkwTtz/eDFUD0L85ckZJGD6ljI/o9xt6wW3wsKp4gCXz3s aheA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g4VY56t8BGvGmnz7boqdc1qWXBW9wwBLZMsTzOiTdoU=; b=P5T8rAdx9pChSWOysbgLODHCKyW6nil7PbS29ifje11SqeVIguEmDACU01kMbO0/Ke GjSqaallPJztxkO9AQduS125jnuicBi2uHHOc4nFl0sk+so487w3MlLqz2PmV6jFCg8f 6ZASLj0VH6BDoH5XYagfj0xvgC+oMUMd+7kntwTyO1A6vtuelKHm8ndLlR6m4bRpozeB r9cp2NVIT9rEH/uqsGXMMACl50kF92ujy3D7mzC9YHBxPCetvSmRpSszb9RM7IxIERlA Fap9C7oNgbnE8jcjKwetNiFezGYxtTj38E8jZU6Jdr9PVAS6/ER4mm2AidBzRgQWTStG 9wmw== X-Gm-Message-State: APjAAAUBoX7RqiL3GS/kyG7NZrQrkbkrd9raxPyvGjJbiDNoqnDFjkmA WJ+lYJ8kxTWMJD8QdJkz9s9V1Booksw= X-Google-Smtp-Source: APXvYqwDcyuOSVRGe3iBDGMnW8XEuqvEgVkWINoL7qQjBbsi5Hl9poQFOHDAopc1rtQFdy4k9+lFbw== X-Received: by 2002:a2e:8156:: with SMTP id t22mr15017899ljg.77.1554718502742; Mon, 08 Apr 2019 03:15:02 -0700 (PDT) Received: from otyshchenko.kyiv.epam.com (ll-22.209.223.85.sovam.net.ua. [85.223.209.22]) by smtp.gmail.com with ESMTPSA id x30sm6275717ljd.38.2019.04.08.03.15.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 08 Apr 2019 03:15:02 -0700 (PDT) From: Oleksandr Tyshchenko To: xen-devel@lists.xenproject.org Date: Mon, 8 Apr 2019 13:14:48 +0300 Message-Id: <1554718489-11318-5-git-send-email-olekstysh@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1554718489-11318-1-git-send-email-olekstysh@gmail.com> References: <1554718489-11318-1-git-send-email-olekstysh@gmail.com> Subject: [Xen-devel] [PATCH V3 4/5] xen/arm: Extend SCIF early prink code to handle other interfaces X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr Tyshchenko , julien.grall@arm.com, sstabellini@kernel.org MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Oleksandr Tyshchenko Extend early prink code to be able to handle other SCIF(X) compatible interfaces as well. These interfaces have lot in common, but mostly differ in offsets and bits for some registers. Introduce "EARLY_PRINTK_VERSION" config option to choose which interface version should be used (to properly apply register offsets). Please note, nothing has been technically changed for Renesas "Lager" and other supported boards (SCIF). The "EARLY_PRINTK_VERSION" option for that board should be empty: CONFIG_EARLY_PRINTK=scif,0xe6e60000 Signed-off-by: Oleksandr Tyshchenko CC: Julien Grall --- Changes in v3: - It was decided not to introduce new debug-scifa.inc for handling SCIFA interface, but to extend existing debug-scif.inc for handling both interfaces. This patch is a result of splitting an initial patch "xen/arm: Add SCIFA UART support for early printk" and only reworks a code --- xen/arch/arm/Rules.mk | 7 +++++++ xen/arch/arm/arm32/debug-scif.inc | 13 +++++++++---- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk index f264592..3d9a0ed 100644 --- a/xen/arch/arm/Rules.mk +++ b/xen/arch/arm/Rules.mk @@ -68,6 +68,13 @@ EARLY_PRINTK_INIT_UART := y EARLY_PRINTK_BAUD := $(word 3,$(EARLY_PRINTK_CFG)) endif endif +ifeq ($(EARLY_PRINTK_INC),scif) +ifneq ($(word 3,$(EARLY_PRINTK_CFG)),) +CFLAGS-y += -DEARLY_PRINTK_VERSION_$(word 3,$(EARLY_PRINTK_CFG)) +else +CFLAGS-y += -DEARLY_PRINTK_VERSION_NONE +endif +endif ifneq ($(EARLY_PRINTK_INC),) EARLY_PRINTK := y diff --git a/xen/arch/arm/arm32/debug-scif.inc b/xen/arch/arm/arm32/debug-scif.inc index 143f05d..a8d2eae 100644 --- a/xen/arch/arm/arm32/debug-scif.inc +++ b/xen/arch/arm/arm32/debug-scif.inc @@ -19,6 +19,11 @@ #include +#ifdef EARLY_PRINTK_VERSION_NONE +#define STATUS_REG SCIF_SCFSR +#define TX_FIFO_REG SCIF_SCFTDR +#endif + /* * SCIF UART wait UART to be ready to transmit * rb: register which contains the UART base address @@ -26,7 +31,7 @@ */ .macro early_uart_ready rb rc 1: - ldrh \rc, [\rb, #SCIF_SCFSR] /* <- SCFSR (status register) */ + ldrh \rc, [\rb, #STATUS_REG] /* Read status register */ tst \rc, #SCFSR_TDFE /* Check TDFE bit */ beq 1b /* Wait for the UART to be ready */ .endm @@ -37,10 +42,10 @@ * rt: register which contains the character to transmit */ .macro early_uart_transmit rb rt - strb \rt, [\rb, #SCIF_SCFTDR] /* -> SCFTDR (data register) */ - ldrh \rt, [\rb, #SCIF_SCFSR] /* <- SCFSR (status register) */ + strb \rt, [\rb, #TX_FIFO_REG] /* Write data register */ + ldrh \rt, [\rb, #STATUS_REG] /* Read status register */ and \rt, \rt, #(~(SCFSR_TEND | SCFSR_TDFE)) /* Clear TEND and TDFE bits */ - strh \rt, [\rb, #SCIF_SCFSR] /* -> SCFSR (status register) */ + strh \rt, [\rb, #STATUS_REG] /* Write status register */ .endm /*