From patchwork Tue Apr 30 21:02:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefano Stabellini X-Patchwork-Id: 10924193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A6444912 for ; Tue, 30 Apr 2019 21:04:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 981EF28A3E for ; Tue, 30 Apr 2019 21:04:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8C5CB28A56; Tue, 30 Apr 2019 21:04:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.0 required=2.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 183E928A3E for ; Tue, 30 Apr 2019 21:04:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hLZu0-0007gl-Lq; Tue, 30 Apr 2019 21:03:00 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hLZtz-0007fJ-77 for xen-devel@lists.xenproject.org; Tue, 30 Apr 2019 21:02:59 +0000 X-Inumbo-ID: 53ffc230-6b8b-11e9-a359-9f8f3d6ac666 Received: from mail.kernel.org (unknown [198.145.29.99]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id 53ffc230-6b8b-11e9-a359-9f8f3d6ac666; Tue, 30 Apr 2019 21:02:56 +0000 (UTC) Received: from sstabellini-ThinkPad-X260.xilinx.com (c-67-164-102-47.hsd1.ca.comcast.net [67.164.102.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 066B321783; Tue, 30 Apr 2019 21:02:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1556658176; bh=VD5hMCcIL+KBa3Ge7Mupl8cu5cYos4MOl+WoJBhT3JA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=VWJqRJ2AvUvc9qOY1nilefqIufGKQouR+mZ8ZVYhNRoTAiGecQyfMa0XqKQHEZb26 zsXv9GZPvoy8iQO4SB9+3TkGhV2b2MS+OxRtSnJ6mVDl2JF7SRHAj+G++kZqSbuv7F fF2pZ/oOefFVzKdJLLjUb5+cemx1lqBUrigFbgro= From: Stefano Stabellini To: xen-devel@lists.xenproject.org Date: Tue, 30 Apr 2019 14:02:45 -0700 Message-Id: <1556658172-8824-3-git-send-email-sstabellini@kernel.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: Subject: [Xen-devel] [PATCH v2 03/10] xen: extend XEN_DOMCTL_memory_mapping to handle memory policy X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Stefano Stabellini , julien.grall@arm.com, sstabellini@kernel.org, JBeulich@suse.com, andrew.cooper3@citrix.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Reuse the existing padding field to pass memory policy information. On Arm, the caller can specify whether the memory should be mapped as device nGRE, which is the default and the only possibility today, or cacheable memory write-back. On x86, the only option is uncachable. The current behavior becomes the default (numerically '0'). On ARM, map device nGRE as p2m_mmio_direct_dev (as it is already done today) and WB cacheable memory as p2m_mmio_direct_c. On x86, return error if the memory policy requested is not MEMORY_POLICY_X86_UC. Signed-off-by: Stefano Stabellini CC: JBeulich@suse.com CC: andrew.cooper3@citrix.com --- Changes in v2: - rebase - use p2m_mmio_direct_c - use EOPNOTSUPP - rename cache_policy to memory policy - rename MEMORY_POLICY_DEVMEM to MEMORY_POLICY_ARM_DEV_nGRE - rename MEMORY_POLICY_MEMORY to MEMORY_POLICY_ARM_MEM_WB - add MEMORY_POLICY_X86_UC - add MEMORY_POLICY_DEFAULT and use it --- xen/common/domctl.c | 23 +++++++++++++++++++++-- xen/include/public/domctl.h | 14 +++++++++++++- 2 files changed, 34 insertions(+), 3 deletions(-) diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 140f979..9f62ead 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -928,6 +928,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) unsigned long mfn_end = mfn + nr_mfns - 1; int add = op->u.memory_mapping.add_mapping; p2m_type_t p2mt; + uint32_t memory_policy = op->u.memory_mapping.memory_policy; ret = -EINVAL; if ( mfn_end < mfn || /* wrap? */ @@ -958,9 +959,27 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) if ( add ) { printk(XENLOG_G_DEBUG - "memory_map:add: dom%d gfn=%lx mfn=%lx nr=%lx\n", - d->domain_id, gfn, mfn, nr_mfns); + "memory_map:add: dom%d gfn=%lx mfn=%lx nr=%lx cache=%u\n", + d->domain_id, gfn, mfn, nr_mfns, memory_policy); + switch ( memory_policy ) + { +#ifdef CONFIG_ARM + case MEMORY_POLICY_ARM_MEM_WB: + p2mt = p2m_mmio_direct_c; + break; + case MEMORY_POLICY_ARM_DEV_nGRE: + p2mt = p2m_mmio_direct_dev; + break; +#endif +#ifdef CONFIG_X86 + case MEMORY_POLICY_X86_UC: + p2mt = p2m_mmio_direct; + break; +#endif + default: + return -EOPNOTSUPP; + } ret = map_regions(d, _gfn(gfn), nr_mfns, _mfn(mfn), p2mt); if ( ret < 0 ) printk(XENLOG_G_WARNING diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 19486d5..9330387 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -571,12 +571,24 @@ struct xen_domctl_bind_pt_irq { */ #define DPCI_ADD_MAPPING 1 #define DPCI_REMOVE_MAPPING 0 +/* + * Default memory policy. Corresponds to: + * Arm: MEMORY_POLICY_ARM_DEV_nGRE + * x86: MEMORY_POLICY_X86_UC + */ +#define MEMORY_POLICY_DEFAULT 0 +/* x86 only. Memory type UNCACHABLE */ +#define MEMORY_POLICY_X86_UC 0 +/* Arm only. Outer Shareable, Device-nGRE memory */ +#define MEMORY_POLICY_ARM_DEV_nGRE 0 +/* Arm only. Outer Shareable, Outer/Inner Write-Back Cacheable memory */ +#define MEMORY_POLICY_ARM_MEM_WB 1 struct xen_domctl_memory_mapping { uint64_aligned_t first_gfn; /* first page (hvm guest phys page) in range */ uint64_aligned_t first_mfn; /* first page (machine page) in range */ uint64_aligned_t nr_mfns; /* number of pages in range (>0) */ uint32_t add_mapping; /* add or remove mapping */ - uint32_t padding; /* padding for 64-bit aligned structure */ + uint32_t memory_policy; /* cacheability of the memory mapping */ };