From patchwork Thu Aug 1 10:22:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 11070477 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B355F1398 for ; Thu, 1 Aug 2019 10:21:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A58AD26E3C for ; Thu, 1 Aug 2019 10:21:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A13428515; Thu, 1 Aug 2019 10:21:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 17C11271FD for ; Thu, 1 Aug 2019 10:20:56 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ht8B1-0001v8-D3; Thu, 01 Aug 2019 10:19:15 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ht8Az-0001tv-TY for xen-devel@lists.xenproject.org; Thu, 01 Aug 2019 10:19:13 +0000 X-Inumbo-ID: cdafed00-b445-11e9-b847-77e277d4568d Received: from mga17.intel.com (unknown [192.55.52.151]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id cdafed00-b445-11e9-b847-77e277d4568d; Thu, 01 Aug 2019 10:19:11 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Aug 2019 03:19:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,333,1559545200"; d="scan'208";a="175207938" Received: from gao-cwp.sh.intel.com ([10.239.159.26]) by orsmga003.jf.intel.com with ESMTP; 01 Aug 2019 03:19:09 -0700 From: Chao Gao To: xen-devel@lists.xenproject.org Date: Thu, 1 Aug 2019 18:22:45 +0800 Message-Id: <1564654971-31328-11-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1564654971-31328-1-git-send-email-chao.gao@intel.com> References: <1564654971-31328-1-git-send-email-chao.gao@intel.com> Subject: [Xen-devel] [PATCH v8 10/16] microcode/amd: call svm_host_osvw_init() in common code X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Ashok Raj , Wei Liu , Andrew Cooper , Jan Beulich , Chao Gao , =?utf-8?q?Roger_Pau_Monn=C3=A9?= MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Introduce a vendor hook, .end_update, for svm_host_osvw_init(). The hook function is called on each cpu after loading an update. It is a preparation for spliting out apply_microcode() from cpu_request_microcode(). Signed-off-by: Chao Gao --- Changes in v8: - new --- xen/arch/x86/microcode.c | 3 +++ xen/arch/x86/microcode_amd.c | 21 ++++++++++----------- xen/include/asm-x86/microcode.h | 1 + 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/microcode.c b/xen/arch/x86/microcode.c index bfb0afb..082b29c 100644 --- a/xen/arch/x86/microcode.c +++ b/xen/arch/x86/microcode.c @@ -277,6 +277,9 @@ static long do_microcode_update(void *_info) if ( error ) info->error = error; + if ( microcode_ops->end_update ) + microcode_ops->end_update(); + info->cpu = cpumask_next(info->cpu, &cpu_online_map); if ( info->cpu < nr_cpu_ids ) return continue_hypercall_on_cpu(info->cpu, do_microcode_update, info); diff --git a/xen/arch/x86/microcode_amd.c b/xen/arch/x86/microcode_amd.c index 83ed8f9..3d1505d 100644 --- a/xen/arch/x86/microcode_amd.c +++ b/xen/arch/x86/microcode_amd.c @@ -600,10 +600,6 @@ static int cpu_request_microcode(const void *buf, size_t bufsize) xfree(mc_amd); out: -#if CONFIG_HVM - svm_host_osvw_init(); -#endif - /* * In some cases we may return an error even if processor's microcode has * been updated. For example, the first patch in a container file is loaded @@ -617,13 +613,8 @@ static int start_update(void) { #if CONFIG_HVM /* - * We assume here that svm_host_osvw_init() will be called on each cpu (from - * cpu_request_microcode()). - * - * Note that if collect_cpu_info() returns an error then - * cpu_request_microcode() will not invoked thus leaving OSVW bits not - * updated. Currently though collect_cpu_info() will not fail on processors - * supporting OSVW so we will not deal with this possibility. + * svm_host_osvw_init() will be called on each cpu by calling '.end_update' + * in common code. */ svm_host_osvw_reset(); #endif @@ -631,11 +622,19 @@ static int start_update(void) return 0; } +static void end_update(void) +{ +#if CONFIG_HVM + svm_host_osvw_init(); +#endif +} + static const struct microcode_ops microcode_amd_ops = { .cpu_request_microcode = cpu_request_microcode, .collect_cpu_info = collect_cpu_info, .apply_microcode = apply_microcode, .start_update = start_update, + .end_update = end_update, .free_patch = free_patch, .compare_patch = compare_patch, .match_cpu = match_cpu, diff --git a/xen/include/asm-x86/microcode.h b/xen/include/asm-x86/microcode.h index 35223eb..c8d2c4f 100644 --- a/xen/include/asm-x86/microcode.h +++ b/xen/include/asm-x86/microcode.h @@ -24,6 +24,7 @@ struct microcode_ops { int (*collect_cpu_info)(struct cpu_signature *csig); int (*apply_microcode)(void); int (*start_update)(void); + void (*end_update)(void); void (*free_patch)(void *mc); bool (*match_cpu)(const struct microcode_patch *patch); enum microcode_match_result (*compare_patch)(