From patchwork Thu Aug 1 10:22:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 11070455 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 057101398 for ; Thu, 1 Aug 2019 10:20:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EB63F22B27 for ; Thu, 1 Aug 2019 10:20:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DF7BF2854F; Thu, 1 Aug 2019 10:20:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 83A0128538 for ; Thu, 1 Aug 2019 10:20:32 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ht8Aq-0001kl-7z; Thu, 01 Aug 2019 10:19:04 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1ht8Ao-0001jn-W5 for xen-devel@lists.xenproject.org; Thu, 01 Aug 2019 10:19:03 +0000 X-Inumbo-ID: c69f26a2-b445-11e9-8aea-af7a2c1d869f Received: from mga17.intel.com (unknown [192.55.52.151]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id c69f26a2-b445-11e9-8aea-af7a2c1d869f; Thu, 01 Aug 2019 10:18:59 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Aug 2019 03:18:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,333,1559545200"; d="scan'208";a="175207894" Received: from gao-cwp.sh.intel.com ([10.239.159.26]) by orsmga003.jf.intel.com with ESMTP; 01 Aug 2019 03:18:57 -0700 From: Chao Gao To: xen-devel@lists.xenproject.org Date: Thu, 1 Aug 2019 18:22:40 +0800 Message-Id: <1564654971-31328-6-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1564654971-31328-1-git-send-email-chao.gao@intel.com> References: <1564654971-31328-1-git-send-email-chao.gao@intel.com> Subject: [Xen-devel] [PATCH v8 05/16] microcode/amd: distinguish old and mismatched ucode in microcode_fits() X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Ashok Raj , Wei Liu , Andrew Cooper , Jan Beulich , Chao Gao , =?utf-8?q?Roger_Pau_Monn=C3=A9?= MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Sometimes, an ucode with a level lower than or equal to current CPU's patch level is useful. For example, to work around a broken bios which only loads ucode for BSP, when BSP parses an ucode blob during bootup, it is better to save an ucode with lower or equal level for APs No functional change is made in this patch. But following patch would handle "old ucode" and "mismatched ucode" separately. Signed-off-by: Chao Gao Reviewed-by: Jan Beulich --- Changes in v8: - new --- xen/arch/x86/microcode_amd.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/microcode_amd.c b/xen/arch/x86/microcode_amd.c index afca51f..e9a567f 100644 --- a/xen/arch/x86/microcode_amd.c +++ b/xen/arch/x86/microcode_amd.c @@ -152,8 +152,8 @@ static bool_t find_equiv_cpu_id(const struct equiv_cpu_entry *equiv_cpu_table, return 0; } -static bool_t microcode_fits(const struct microcode_amd *mc_amd, - unsigned int cpu) +static enum microcode_match_result microcode_fits( + const struct microcode_amd *mc_amd, unsigned int cpu) { struct ucode_cpu_info *uci = &per_cpu(ucode_cpu_info, cpu); const struct microcode_header_amd *mc_header = mc_amd->mpb; @@ -167,27 +167,27 @@ static bool_t microcode_fits(const struct microcode_amd *mc_amd, current_cpu_id = cpuid_eax(0x00000001); if ( !find_equiv_cpu_id(equiv_cpu_table, current_cpu_id, &equiv_cpu_id) ) - return 0; + return MIS_UCODE; if ( (mc_header->processor_rev_id) != equiv_cpu_id ) - return 0; + return MIS_UCODE; if ( !verify_patch_size(mc_amd->mpb_size) ) { pr_debug("microcode: patch size mismatch\n"); - return 0; + return MIS_UCODE; } if ( mc_header->patch_id <= uci->cpu_sig.rev ) { pr_debug("microcode: patch is already at required level or greater.\n"); - return 0; + return OLD_UCODE; } pr_debug("microcode: CPU%d found a matching microcode update with version %#x (current=%#x)\n", cpu, mc_header->patch_id, uci->cpu_sig.rev); - return 1; + return NEW_UCODE; } static int apply_microcode(unsigned int cpu) @@ -502,7 +502,7 @@ static int cpu_request_microcode(unsigned int cpu, const void *buf, while ( (error = get_ucode_from_buffer_amd(mc_amd, buf, bufsize, &offset)) == 0 ) { - if ( microcode_fits(mc_amd, cpu) ) + if ( microcode_fits(mc_amd, cpu) == NEW_UCODE ) { error = apply_microcode(cpu); if ( error ) @@ -583,7 +583,7 @@ static int microcode_resume_match(unsigned int cpu, const void *mc) struct microcode_amd *mc_amd = uci->mc.mc_amd; const struct microcode_amd *src = mc; - if ( !microcode_fits(src, cpu) ) + if ( microcode_fits(src, cpu) != NEW_UCODE ) return 0; if ( src != mc_amd )