diff mbox series

[v5,02/15] x86/cpu: Fix common cpuid faulting probing for AMD and Hygon

Message ID 1a5980e4c873b562ef23c84117f0daa5ad42b122.1554382869.git.puwen@hygon.cn (mailing list archive)
State New, archived
Headers show
Series Add support for Hygon Dhyana Family 18h processor | expand

Commit Message

Pu Wen April 4, 2019, 1:45 p.m. UTC 
There is no MSR_INTEL_PLATFORM_INFO for AMD and Hygon families. Read
this MSR will stop the Xen initialization process in some Hygon
systems or produce GPF(0). So directly return false in the function
probe_cpuid_faulting() if !cpu_has_hypervisor.

Signed-off-by: Pu Wen <puwen@hygon.cn>
Acked-by: Jan Beulich <jbeulich@suse.com>
---
 xen/arch/x86/cpu/common.c | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 74c9426..1a095fc 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -116,6 +116,11 @@  bool __init probe_cpuid_faulting(void)
 	uint64_t val;
 	int rc;
 
+	if ((boot_cpu_data.x86_vendor == X86_VENDOR_HYGON ||
+	     boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
+	    !cpu_has_hypervisor)
+		return false;
+
 	if ((rc = rdmsr_safe(MSR_INTEL_PLATFORM_INFO, val)) == 0)
 		raw_msr_policy.plaform_info.cpuid_faulting =
 			val & MSR_PLATFORM_INFO_CPUID_FAULTING;