| Message ID | 20170217063936.13208-6-haozhong.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>>> On 17.02.17 at 07:39, <haozhong.zhang@intel.com> wrote: > The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was > surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated > from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. > Because Xen had dropped support for 32-bit x86 host, these two loops > can be merged now. No, they can't - the number spaces aren't contiguous. Jan
On 02/17/17 02:58 -0700, Jan Beulich wrote: >>>> On 17.02.17 at 07:39, <haozhong.zhang@intel.com> wrote: >> The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was >> surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated >> from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. >> Because Xen had dropped support for 32-bit x86 host, these two loops >> can be merged now. > >No, they can't - the number spaces aren't contiguous. > Sorry, my mistake. I'll drop this one. Thanks, Haozhong
diff --git a/xen/arch/x86/cpu/mcheck/mce_intel.c b/xen/arch/x86/cpu/mcheck/mce_intel.c index 005e41d..498e8e4 100644 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -211,10 +211,7 @@ intel_get_extended_msrs(struct mcinfo_global *mig, struct mc_info *mi) mc_ext->common.type = MC_TYPE_EXTENDED; mc_ext->common.size = sizeof(struct mcinfo_extended); - for (i = MSR_IA32_MCG_EAX; i <= MSR_IA32_MCG_MISC; i++) - intel_get_extended_msr(mc_ext, i); - - for (i = MSR_IA32_MCG_R8; i <= MSR_IA32_MCG_R15; i++) + for (i = MSR_IA32_MCG_EAX; i <= MSR_IA32_MCG_R15; i++) intel_get_extended_msr(mc_ext, i); return mc_ext;
The second loop that gets MSR_IA32_MCG_R8 to MSR_IA32_MCG_R15 was surrounded by '#ifdef __X86_64__ ... #endif' and had to be seperated from the first loop that gets MSR_IA32_MCG_EAX to MSR_IA32_MCG_MISC. Because Xen had dropped support for 32-bit x86 host, these two loops can be merged now. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- Cc: Christoph Egger <chegger@amazon.de> Cc: Liu Jinsong <jinsong.liu@alibaba-inc.com> Cc: Jan Beulich <jbeulich@suse.com> Cc: Andrew Cooper <andrew.cooper3@citrix.com> --- xen/arch/x86/cpu/mcheck/mce_intel.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-)