From patchwork Fri Feb 24 10:52:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 9589911 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 53D6A60471 for ; Fri, 24 Feb 2017 10:55:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3915E2894F for ; Fri, 24 Feb 2017 10:55:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E01628952; Fri, 24 Feb 2017 10:55:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B20462894F for ; Fri, 24 Feb 2017 10:55:55 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1chDVS-0003xU-C2; Fri, 24 Feb 2017 10:53:46 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1chDVR-0003sw-22 for xen-devel@lists.xen.org; Fri, 24 Feb 2017 10:53:45 +0000 Received: from [85.158.137.68] by server-9.bemta-3.messagelabs.com id 78/93-12625-8B010B85; Fri, 24 Feb 2017 10:53:44 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrALMWRWlGSWpSXmKPExsXS1tYhortNYEO EwdGL3BZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa8bVPxvYC1ZwVTRtOMbewHiPo4uRi0NIYBqj xNrt/exdjJwcEgK8EkeWzWCFsP0lFrTNYYQo6mWUWLdvCyNIgk1AX2LF44NgRSIC0hLXPl8GK 2IW6GCSaPv2hQUkISzgInFzykywIhYBVYlVX86DbeAVsJXonTmRDWKDvMSFq6fA6jkF7CQuHl wNtkAIqGZd9wPmCYy8CxgZVjFqFKcWlaUW6RqZ6CUVZaZnlOQmZuboGhoY6+WmFhcnpqfmJCY V6yXn525iBIZEPQMD4w7GV8f9DjFKcjApifL+f7g+QogvKT+lMiOxOCO+qDQntfgQowwHh5IE bzT/hgghwaLU9NSKtMwcYHDCpCU4eJREeN+BpHmLCxJzizPTIVKnGBWlxHkFQRICIImM0jy4N lhEXGKUlRLmZWRgYBDiKUgtys0sQZV/xSjOwagkzFsJMoUnM68EbvoroMVMQIstndeCLC5JRE hJNTAKLlAoebOZ10m/ee4lRou+3Cktpar+lxe+Npr2QoVhb4XPxePH/cPjzLZ/M7j8k/+5mFC V4o1VE2dmdnEum+ChbuG/9az5BOs5/r/eennc+F10M0FrW6DKms6PqQ2nZ0u85JW7GRSelFN7 ukFOzOhq2fkzBsu+VfyoEVzqGNwx6XXhFpYp2+WUWIozEg21mIuKEwGflUYfgwIAAA== X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-10.tower-31.messagelabs.com!1487933615!86569883!4 X-Originating-IP: [134.134.136.20] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogMTM0LjEzNC4xMzYuMjAgPT4gMzU1MzU4\n X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 5797 invoked from network); 24 Feb 2017 10:53:41 -0000 Received: from mga02.intel.com (HELO mga02.intel.com) (134.134.136.20) by server-10.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 24 Feb 2017 10:53:41 -0000 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Feb 2017 02:53:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,200,1484035200"; d="scan'208";a="937650297" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.133]) by orsmga003.jf.intel.com with ESMTP; 24 Feb 2017 02:53:39 -0800 From: Haozhong Zhang To: xen-devel@lists.xen.org Date: Fri, 24 Feb 2017 18:52:54 +0800 Message-Id: <20170224105256.24668-6-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170224105256.24668-1-haozhong.zhang@intel.com> References: <20170224105256.24668-1-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Jan Beulich , Andrew Cooper , Christoph Egger , Suravee Suthikulpanit , Boris Ostrovsky Subject: [Xen-devel] [PATCH 5/7] x86/mce: clear MSR_IA32_MCG_STATUS by writing 0 X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP On Intel CPU, an attemp to write to MSR_IA32_MCG_STATUS with any non-zero value would result in #GP. This commit writes 0 on AMD CPU as well instead of just clearing MCIP bit, because all non-reserved bits of MSR_IA32_MCG_STATUS have been handled at this point. Signed-off-by: Haozhong Zhang Reviewed-by: Boris Ostrovsky Reviewed-by: Jan Beulich --- Cc: Christoph Egger Cc: Jan Beulich Cc: Andrew Cooper Cc: Boris Ostrovsky Cc: Suravee Suthikulpanit Changes: * Write 0 on AMD as well. * Change the patch title to reflect the above change. --- xen/arch/x86/cpu/mcheck/mce.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 53ca29c..5a7e2ba 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -539,7 +539,7 @@ void mcheck_cmn_handler(const struct cpu_user_regs *regs) gstatus = mca_rdmsr(MSR_IA32_MCG_STATUS); if ((gstatus & MCG_STATUS_MCIP) != 0) { mce_printk(MCE_CRITICAL, "MCE: Clear MCIP@ last step"); - mca_wrmsr(MSR_IA32_MCG_STATUS, gstatus & ~MCG_STATUS_MCIP); + mca_wrmsr(MSR_IA32_MCG_STATUS, 0); } mce_barrier_exit(&mce_trap_bar);