| Message ID | 20170224105256.24668-7-haozhong.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
>>> On 24.02.17 at 11:52, <haozhong.zhang@intel.com> wrote: > --- a/xen/arch/x86/cpu/mcheck/mce.c > +++ b/xen/arch/x86/cpu/mcheck/mce.c > @@ -1621,8 +1621,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs, > handlers = mce_uhandlers; > } > > - /* At least a default handler should be registerd */ > - ASSERT(handler_num); > + /* At least a default handler should be registered for Intel CPU. */ > + ASSERT(handler_num || boot_cpu_data.x86_vendor != X86_VENDOR_INTEL); > > local_mi = (struct mc_info*)mctelem_dataptr(mctc); > x86_mcinfo_lookup(mic, local_mi, MC_TYPE_GLOBAL); > @@ -1656,7 +1656,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs, > break; > } > } > - ASSERT(i != handler_num); > + ASSERT(i != handler_num || > + boot_cpu_data.x86_vendor != X86_VENDOR_INTEL); > } > > return worst_result; I think both ASSERT()s should simply be removed: The code is fine with the conditions they check violated, and debug builds can't have worked due to their presence on AMD at all (yet production builds would have been fine). Jan
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c index 5a7e2ba..81d0902 100644 --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -1621,8 +1621,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs, handlers = mce_uhandlers; } - /* At least a default handler should be registerd */ - ASSERT(handler_num); + /* At least a default handler should be registered for Intel CPU. */ + ASSERT(handler_num || boot_cpu_data.x86_vendor != X86_VENDOR_INTEL); local_mi = (struct mc_info*)mctelem_dataptr(mctc); x86_mcinfo_lookup(mic, local_mi, MC_TYPE_GLOBAL); @@ -1656,7 +1656,8 @@ static enum mce_result mce_action(const struct cpu_user_regs *regs, break; } } - ASSERT(i != handler_num); + ASSERT(i != handler_num || + boot_cpu_data.x86_vendor != X86_VENDOR_INTEL); } return worst_result;
mce_dhandlers[] and its array size mce_dhandler_num are not used and set on non-Intel platforms, so the corresponding ASSERT's in mce_action() should be valid only for Intel. Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com> --- Cc: Christoph Egger <chegger@amazon.de> Cc: Jan Beulich <jbeulich@suse.com> Cc: Andrew Cooper <andrew.cooper3@citrix.com> --- xen/arch/x86/cpu/mcheck/mce.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)