From patchwork Fri Mar 17 06:46:11 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 9629913 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B74FB60245 for ; Fri, 17 Mar 2017 06:49:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7E4A28698 for ; Fri, 17 Mar 2017 06:49:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9CCCA2869F; Fri, 17 Mar 2017 06:49:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DED8928698 for ; Fri, 17 Mar 2017 06:49:07 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1colez-0000dS-Ij; Fri, 17 Mar 2017 06:46:49 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1colez-0000ca-3f for xen-devel@lists.xen.org; Fri, 17 Mar 2017 06:46:49 +0000 Received: from [85.158.137.68] by server-9.bemta-3.messagelabs.com id 70/D1-20914-8568BC85; Fri, 17 Mar 2017 06:46:48 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrJLMWRWlGSWpSXmKPExsVywNxEWze87XS EwcsT6hZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0bvl3nsBUvMK44vOsXSwNin1cXIySEkUCHx f/EORhBbQoBX4siyGawQdoBE+6a/TBA1vYwSff2BIDabgL7EiscHwWpEBKQlrn2+DNTLxcEsc JRR4lP7crCEsECixMfdR8FsFgFVie3T54EN4hWwk/g6v4UFYoG8xIWrp8BsTqD4x8ZbLBDLbC UaG24zTWDkXcDIsIpRvTi1qCy1SNdUL6koMz2jJDcxM0fX0MBYLze1uDgxPTUnMalYLzk/dxM jMBjqGRgYdzBe/up0iFGSg0lJlFdF8ESEEF9SfkplRmJxRnxRaU5q8SFGGQ4OJQle8flAOcGi 1PTUirTMHGBYwqQlOHiURHhtQdK8xQWJucWZ6RCpU4y6HHNm737DJMSSl5+XKiXOe3UeUJEAS FFGaR7cCFiMXGKUlRLmZWRgYBDiKUgtys0sQZV/xSjOwagkzOsMsoonM68EbtMroCOYgI5I/H kE5IiSRISUVANjv59c2Z5PX2ZcMn2ycSfL5h+Pv19UX2s369pNkUzDKPaMquLIa//y2yL2cfo yyq45bb08+PUWK0Up2duzvt8x+TNdsOjXizmuxbkTz3bLadzgSVL7rFu0vYJt/RWbauF2z/IK k+TGjDuXXgRfylZZsr5f8/H26J4a5manTQLOSwT5G5ZK37igxFKckWioxVxUnAgACAMEn4wCA AA= X-Env-Sender: haozhong.zhang@intel.com X-Msg-Ref: server-11.tower-31.messagelabs.com!1489733199!59832828!4 X-Originating-IP: [192.55.52.43] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.2.3; banners=-,-,- X-VirusChecked: Checked Received: (qmail 12393 invoked from network); 17 Mar 2017 06:46:47 -0000 Received: from mga05.intel.com (HELO mga05.intel.com) (192.55.52.43) by server-11.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Mar 2017 06:46:47 -0000 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP; 16 Mar 2017 23:46:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.36,175,1486454400"; d="scan'208"; a="1109452664" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.153]) by orsmga001.jf.intel.com with ESMTP; 16 Mar 2017 23:46:45 -0700 From: Haozhong Zhang To: xen-devel@lists.xen.org Date: Fri, 17 Mar 2017 14:46:11 +0800 Message-Id: <20170317064614.23539-10-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20170317064614.23539-1-haozhong.zhang@intel.com> References: <20170317064614.23539-1-haozhong.zhang@intel.com> Cc: Haozhong Zhang , Ian Jackson , Wei Liu , Jan Beulich , Andrew Cooper Subject: [Xen-devel] [PATCH v2 09/12] x86/vmce, tools/libxl: expose LMCE capability in guest MSR_IA32_MCG_CAP X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP If LMCE is supported by host and ' mca_caps = [ "lmce" ] ' is present in xl config, the LMCE capability will be exposed in guest MSR_IA32_MCG_CAP. By default, LMCE is not exposed to guest so as to keep the backwards migration compatibility. Signed-off-by: Haozhong Zhang --- Cc: Ian Jackson Cc: Wei Liu Cc: Jan Beulich Cc: Andrew Cooper Changes in v2: * Allow restore an LMCE enabled guest on an LMCE-incapable host. * Change xl config to "mca_caps = [ "lmce" ]", which can be extended to support other MCA capabilities in the future. --- docs/man/xl.cfg.pod.5.in | 24 ++++++++++++++++++++++++ tools/libxl/libxl_dom.c | 30 ++++++++++++++++++++++++++++++ tools/libxl/libxl_types.idl | 1 + tools/xl/xl_parse.c | 4 ++++ xen/arch/x86/cpu/mcheck/vmce.c | 19 ++++++++++++++++++- xen/arch/x86/hvm/hvm.c | 5 +++++ xen/include/asm-x86/mce.h | 1 + xen/include/public/hvm/params.h | 7 ++++++- 8 files changed, 89 insertions(+), 2 deletions(-) diff --git a/docs/man/xl.cfg.pod.5.in b/docs/man/xl.cfg.pod.5.in index 505c111..d75dcd2 100644 --- a/docs/man/xl.cfg.pod.5.in +++ b/docs/man/xl.cfg.pod.5.in @@ -2021,6 +2021,30 @@ natively or via hardware backwards compatibility support. =back +=head3 x86 + +=over 4 + +=item B + +(HVM only) Enable MCA capabilities besides default ones enabled +by Xen hypervisor for the HVM domain. "CAP" can be one in the +following list: + +=over 4 + +=item B<"lmce"> + +Intel local MCE + +=item B + +No MCA capabilities in above list are enabled. + +=back + +=back + =head1 SEE ALSO =over 4 diff --git a/tools/libxl/libxl_dom.c b/tools/libxl/libxl_dom.c index d519c8d..91b2f08 100644 --- a/tools/libxl/libxl_dom.c +++ b/tools/libxl/libxl_dom.c @@ -275,6 +275,32 @@ err: libxl_bitmap_dispose(&enlightenments); return ERROR_FAIL; } + +static int hvm_set_mca_capabilities(libxl__gc *gc, uint32_t domid, + libxl_domain_build_info *const info) +{ + int i, rc = 0; + const libxl_string_list xl_caps = info->u.hvm.mca_caps; + unsigned long caps = 0; + + if (!xl_caps) + return 0; + + for (i = 0; xl_caps[i] != NULL; i++) { + if (!strcmp(xl_caps[i], "lmce")) + caps |= HVMMCA_CAP_LMCE; + else { + LOG(ERROR, "Unsupported MCA capability %s", xl_caps[i]); + rc = ERROR_FAIL; + break; + } + } + + if (!rc) + rc = xc_hvm_param_set(CTX->xch, domid, HVM_PARAM_MCA_CAP, caps); + + return rc; +} #endif static void hvm_set_conf_params(xc_interface *handle, uint32_t domid, @@ -438,6 +464,10 @@ int libxl__build_pre(libxl__gc *gc, uint32_t domid, rc = hvm_set_viridian_features(gc, domid, info); if (rc) return rc; + + rc = hvm_set_mca_capabilities(gc, domid, info); + if (rc) + return rc; #endif } diff --git a/tools/libxl/libxl_types.idl b/tools/libxl/libxl_types.idl index a612d1f..71c6c33 100644 --- a/tools/libxl/libxl_types.idl +++ b/tools/libxl/libxl_types.idl @@ -550,6 +550,7 @@ libxl_domain_build_info = Struct("domain_build_info",[ ("serial_list", libxl_string_list), ("rdm", libxl_rdm_reserve), ("rdm_mem_boundary_memkb", MemKB), + ("mca_caps", libxl_string_list), ])), ("pv", Struct(None, [("kernel", string), ("slack_memkb", MemKB), diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 1ef0c27..11a9f51 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -1084,6 +1084,10 @@ void parse_config_data(const char *config_source, if (!xlu_cfg_get_long (config, "rdm_mem_boundary", &l, 0)) b_info->u.hvm.rdm_mem_boundary_memkb = l * 1024; + + xlu_cfg_get_list_as_string_list(config, "mca_caps", + &b_info->u.hvm.mca_caps, false); + break; case LIBXL_DOMAIN_TYPE_PV: { diff --git a/xen/arch/x86/cpu/mcheck/vmce.c b/xen/arch/x86/cpu/mcheck/vmce.c index 994a50e..5dc790f 100644 --- a/xen/arch/x86/cpu/mcheck/vmce.c +++ b/xen/arch/x86/cpu/mcheck/vmce.c @@ -74,7 +74,7 @@ int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt) unsigned long guest_mcg_cap; if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL ) - guest_mcg_cap = INTEL_GUEST_MCG_CAP; + guest_mcg_cap = INTEL_GUEST_MCG_CAP | MCG_LMCE_P; else guest_mcg_cap = AMD_GUEST_MCG_CAP; @@ -546,3 +546,20 @@ int unmmap_broken_page(struct domain *d, mfn_t mfn, unsigned long gfn) return rc; } +int vmce_enable_mca_cap(struct domain *d, uint64_t cap) +{ + struct vcpu *v; + + if ( cap & ~HVMMCA_CAP_MASK ) + return -EINVAL; + + if ( cap & HVMMCA_CAP_LMCE ) + { + if ( !lmce_support ) + return -EINVAL; + for_each_vcpu(d, v) + v->arch.vmce.mcg_cap |= MCG_LMCE_P; + } + + return 0; +} diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index ccfae4f..0007e3d 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -4045,6 +4045,7 @@ static int hvm_allow_set_param(struct domain *d, case HVM_PARAM_IOREQ_SERVER_PFN: case HVM_PARAM_NR_IOREQ_SERVER_PAGES: case HVM_PARAM_ALTP2M: + case HVM_PARAM_MCA_CAP: if ( value != 0 && a->value != value ) rc = -EEXIST; break; @@ -4257,6 +4258,10 @@ static int hvmop_set_param( (0x10000 / 8) + 1) << 32); a.value |= VM86_TSS_UPDATED; break; + + case HVM_PARAM_MCA_CAP: + rc = vmce_enable_mca_cap(d, a.value); + break; } if ( rc != 0 ) diff --git a/xen/include/asm-x86/mce.h b/xen/include/asm-x86/mce.h index dee66b3..70eb50c 100644 --- a/xen/include/asm-x86/mce.h +++ b/xen/include/asm-x86/mce.h @@ -38,6 +38,7 @@ extern int vmce_restore_vcpu(struct vcpu *, const struct hvm_vmce_vcpu *); extern int vmce_wrmsr(uint32_t msr, uint64_t val); extern int vmce_rdmsr(uint32_t msr, uint64_t *val); extern bool vmce_support_lmce(const struct vcpu *v); +extern int vmce_enable_mca_cap(struct domain *d, uint64_t cap); extern unsigned int nr_mce_banks; diff --git a/xen/include/public/hvm/params.h b/xen/include/public/hvm/params.h index 58c8478..266c123 100644 --- a/xen/include/public/hvm/params.h +++ b/xen/include/public/hvm/params.h @@ -259,6 +259,11 @@ */ #define HVM_PARAM_VM86_TSS_SIZED 37 -#define HVM_NR_PARAMS 38 +/* Enable MCA capabilities. */ +#define HVM_PARAM_MCA_CAP 38 +#define HVMMCA_CAP_LMCE (1UL << 27) +#define HVMMCA_CAP_MASK HVMMCA_CAP_LMCE + +#define HVM_NR_PARAMS 39 #endif /* __XEN_PUBLIC_HVM_PARAMS_H__ */