@@ -106,7 +106,7 @@ static void smp_store_cpu_info(int id)
* TSC's upper 32 bits can't be written in earlier CPUs (before
* Prescott), there is no way to resync one AP against BP.
*/
-bool_t disable_tsc_sync;
+bool disable_tsc_sync;
static atomic_t tsc_count;
static uint64_t tsc_value;
@@ -975,7 +975,8 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t pxm)
/* Physically added CPUs do not have synchronised TSC. */
if ( boot_cpu_has(X86_FEATURE_TSC_RELIABLE) )
{
- static bool_t once_only;
+ static bool once_only;
+
if ( !test_and_set_bool(once_only) )
printk(XENLOG_WARNING
" ** New physical CPU %u may have skewed TSC and hence "
@@ -1568,7 +1568,7 @@ static void __init tsc_check_writability(void)
cpuidle_disable_deep_cstate();
/* synchronize_tsc_slave() must do nothing */
- disable_tsc_sync = 1;
+ disable_tsc_sync = true;
}
static void __init reset_percpu_time(void *unused)
@@ -24,7 +24,7 @@
typedef u64 cycles_t;
-extern bool_t disable_tsc_sync;
+extern bool disable_tsc_sync;
static inline cycles_t get_cycles(void)
{
Signed-off-by: Wei Liu <wei.liu2@citrix.com> --- xen/arch/x86/smpboot.c | 5 +++-- xen/arch/x86/time.c | 2 +- xen/include/asm-x86/time.h | 2 +- 3 files changed, 5 insertions(+), 4 deletions(-)