| Message ID | 20170808171726.28966-1-julien.grall@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, 8 Aug 2017, Julien Grall wrote: > Xen allows shared mapping to be Normal inner-cacheable with any inner cache > allocation strategy and no restriction of the outer-cacheability. > > However, Xen is always mapping those region Normal Inner Write-Back > Outer Write-Back Inner-shareable. Per B2.8 "Mismatched memory > attributes" in ARM DDI 0487B.a, if the guest is not using the exact same > memory attributes (excluding any cache allocation hints) for the shared > region then the region will be accessed with mismatched attributes. > > This will result to potential loss of coherency, and may impact the > performance. > > Given that the ARM ARM strongly recommends to avoid using mismatched > attributes, we should impose shared region to be Normal Inner Write-Back > Outer Write-Back Inner-shareable. > > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > xen/include/public/arch-arm.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h > index bd974fb13d..8f9d06ef7f 100644 > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -61,15 +61,15 @@ > * > * All memory which is shared with other entities in the system > * (including the hypervisor and other guests) must reside in memory > - * which is mapped as Normal Inner-cacheable. This applies to: > + * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable. > + * This applies to: > * - hypercall arguments passed via a pointer to guest memory. > * - memory shared via the grant table mechanism (including PV I/O > * rings etc). > * - memory shared with the hypervisor (struct shared_info, struct > * vcpu_info, the grant table, etc). > * > - * Any Inner cache allocation strategy (Write-Back, Write-Through etc) > - * is acceptable. There is no restriction on the Outer-cacheability. > + * Any cache allocation hints are acceptable. > */ > > /*
diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index bd974fb13d..8f9d06ef7f 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -61,15 +61,15 @@ * * All memory which is shared with other entities in the system * (including the hypervisor and other guests) must reside in memory - * which is mapped as Normal Inner-cacheable. This applies to: + * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable. + * This applies to: * - hypercall arguments passed via a pointer to guest memory. * - memory shared via the grant table mechanism (including PV I/O * rings etc). * - memory shared with the hypervisor (struct shared_info, struct * vcpu_info, the grant table, etc). * - * Any Inner cache allocation strategy (Write-Back, Write-Through etc) - * is acceptable. There is no restriction on the Outer-cacheability. + * Any cache allocation hints are acceptable. */ /*
Xen allows shared mapping to be Normal inner-cacheable with any inner cache allocation strategy and no restriction of the outer-cacheability. However, Xen is always mapping those region Normal Inner Write-Back Outer Write-Back Inner-shareable. Per B2.8 "Mismatched memory attributes" in ARM DDI 0487B.a, if the guest is not using the exact same memory attributes (excluding any cache allocation hints) for the shared region then the region will be accessed with mismatched attributes. This will result to potential loss of coherency, and may impact the performance. Given that the ARM ARM strongly recommends to avoid using mismatched attributes, we should impose shared region to be Normal Inner Write-Back Outer Write-Back Inner-shareable. Signed-off-by: Julien Grall <julien.grall@arm.com> --- xen/include/public/arch-arm.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)