From patchwork Mon Aug 14 14:24:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 9899041 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E78B36038C for ; Mon, 14 Aug 2017 14:27:23 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DA5F6284D1 for ; Mon, 14 Aug 2017 14:27:23 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CEE8C28534; Mon, 14 Aug 2017 14:27:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id E7C922866E for ; Mon, 14 Aug 2017 14:27:18 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dhGIq-0001JT-E4; Mon, 14 Aug 2017 14:25:12 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dhGIp-0001Fi-7x for xen-devel@lists.xen.org; Mon, 14 Aug 2017 14:25:11 +0000 Received: from [85.158.139.211] by server-2.bemta-5.messagelabs.com id 9D/7A-01996-6C2B1995; Mon, 14 Aug 2017 14:25:10 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMLMWRWlGSWpSXmKPExsVysyfVTffQpom RBi9Pmlks+biYxYHR4+ju30wBjFGsmXlJ+RUJrBnXbkxkLDglXrHmwH7WBsbjgl2MXBxCApsY JSZdb2GEcE4zSrxatZSpi5GTg01AU+LO509gtoiAtMS1z5fBipgFtjNKnJ/7mx0kISyQLHFg0 3Mgm4ODRUBV4sWqCJAwr4CVxK+OX4wgtoSAvMSutousIDYnULzz7k4WEFtIwFLixOrZbBMYuR cwMqxi1ChOLSpLLdI1NNFLKspMzyjJTczM0TU0MNXLTS0uTkxPzUlMKtZLzs/dxAj0MAMQ7GA 8e9rzEKMkB5OSKG+CT2+kEF9SfkplRmJxRnxRaU5q8SFGGQ4OJQne1I0TI4UEi1LTUyvSMnOA oQaTluDgURLhnQWS5i0uSMwtzkyHSJ1i1OV4NeH/NyYhlrz8vFQpcd5ykCIBkKKM0jy4EbCwv 8QoKyXMywh0lBBPQWpRbmYJqvwrRnEORiVh3kqQKTyZeSVwm14BHcEEdEQfyP28xSWJCCmpBk b+vFvii7KPLDh7dcE/r+rdjUfDM/kULn+zP/6tfr5CnTbHE22BGvVDy1wi/byi1vgwMLuzV6S fNmzOZMkTYVG6Zdy3OPRvjdjTszk8LR63rkVZ5IarbT57s2xhy/VbL1+KxXi+OMEygWN+dJPh +7tWJ9K3pd/6Jqe+PTb27yy5OmXPE9m7liuxFGckGmoxFxUnAgCjrPf5dgIAAA== X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-3.tower-206.messagelabs.com!1502720706!103619332!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 29093 invoked from network); 14 Aug 2017 14:25:06 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-3.tower-206.messagelabs.com with SMTP; 14 Aug 2017 14:25:06 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2015C80D; Mon, 14 Aug 2017 07:25:06 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E0BC33F483; Mon, 14 Aug 2017 07:25:04 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Mon, 14 Aug 2017 15:24:18 +0100 Message-Id: <20170814142418.13267-28-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170814142418.13267-1-julien.grall@arm.com> References: <20170814142418.13267-1-julien.grall@arm.com> Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org, Ross Lagerwall Subject: [Xen-devel] [PATCH 27/27] xen/arm: mm: Use memory flags for modify_xen_mappings rather than custom one X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This will help to consolidate the page-table code and avoid different path depending on the action to perform. Signed-off-by: Julien Grall Reviewed-by: Andre Przywara --- Cc: Konrad Rzeszutek Wilk Cc: Ross Lagerwall arch_livepatch_secure is now the same as on x86. It might be possible to combine both, but I left that alone for now. --- xen/arch/arm/livepatch.c | 6 +++--- xen/arch/arm/mm.c | 5 ++--- xen/include/asm-arm/page.h | 11 ----------- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c index 3e53524365..279d52cc6c 100644 --- a/xen/arch/arm/livepatch.c +++ b/xen/arch/arm/livepatch.c @@ -146,15 +146,15 @@ int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type type) switch ( type ) { case LIVEPATCH_VA_RX: - flags = PTE_RO; /* R set, NX clear */ + flags = PAGE_HYPERVISOR_RX; break; case LIVEPATCH_VA_RW: - flags = PTE_NX; /* R clear, NX set */ + flags = PAGE_HYPERVISOR_RW; break; case LIVEPATCH_VA_RO: - flags = PTE_NX | PTE_RO; /* R set, NX set */ + flags = PAGE_HYPERVISOR_RO; break; default: diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index fe0646002e..c2fd4baef9 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -1046,8 +1046,8 @@ static int create_xen_entries(enum xenmap_operation op, else { pte = *entry; - pte.pt.ro = PTE_RO_MASK(flags); - pte.pt.xn = PTE_NX_MASK(flags); + pte.pt.ro = PAGE_RO_MASK(flags); + pte.pt.xn = PAGE_XN_MASK(flags); if ( !pte.pt.ro && !pte.pt.xn ) { printk("%s: Incorrect combination for addr=%lx\n", @@ -1090,7 +1090,6 @@ int destroy_xen_mappings(unsigned long v, unsigned long e) int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags) { - ASSERT((flags & (PTE_NX | PTE_RO)) == flags); return create_xen_entries(MODIFY, s, INVALID_MFN, (e - s) >> PAGE_SHIFT, flags); } diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index 047220f86b..079097d429 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -91,17 +91,6 @@ #define PAGE_HYPERVISOR_WC (_PAGE_DEVICE|MT_NORMAL_NC) /* - * Defines for changing the hypervisor PTE .ro and .nx bits. This is only to be - * used with modify_xen_mappings. - */ -#define _PTE_NX_BIT 0U -#define _PTE_RO_BIT 1U -#define PTE_NX (1U << _PTE_NX_BIT) -#define PTE_RO (1U << _PTE_RO_BIT) -#define PTE_NX_MASK(x) (((x) >> _PTE_NX_BIT) & 0x1U) -#define PTE_RO_MASK(x) (((x) >> _PTE_RO_BIT) & 0x1U) - -/* * Stage 2 Memory Type. * * These are valid in the MemAttr[3:0] field of an LPAE stage 2 page