From patchwork Thu Aug 17 14:44:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Liu X-Patchwork-Id: 9906521 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E03CE6038C for ; Thu, 17 Aug 2017 14:49:39 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D24D028B3B for ; Thu, 17 Aug 2017 14:49:39 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C730428B3D; Thu, 17 Aug 2017 14:49:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 789CA28B3B for ; Thu, 17 Aug 2017 14:49:39 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1diM5A-0002t3-D9; Thu, 17 Aug 2017 14:47:36 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1diM58-0002pK-WE for xen-devel@lists.xenproject.org; Thu, 17 Aug 2017 14:47:35 +0000 Received: from [193.109.254.147] by server-10.bemta-6.messagelabs.com id A3/33-18185-68CA5995; Thu, 17 Aug 2017 14:47:34 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRWlGSWpSXmKPExsXitHSDvW7rmqm RBuf6zSy+b5nM5MDocfjDFZYAxijWzLyk/IoE1owX37ewFbwUr1jRv4CtgfGYYBcjJ4eEgL9E 06pdrCA2m4CyxM/OXjYQW0RAT6LpwHPGLkYuDmaBOYwSU+d2MYIkhAU8JP6u72cGsVkEVCU2f rjKAmLzClhK7Np1hAliqLzErraLYEM5geKHJi0GqxcSsJCY/aGdHcJWkOiYfowJoldQ4uTMJ2 BzmAUkJA6+eME8gZF3FpLULCSpBYxMqxg1ilOLylKLdI3M9JKKMtMzSnITM3N0DQ3M9HJTi4s T01NzEpOK9ZLzczcxAsOHAQh2MJ5ZEHiIUZKDSUmU9/esKZFCfEn5KZUZicUZ8UWlOanFhxhl ODiUJHgLV0+NFBIsSk1PrUjLzAEGMkxagoNHSYT3/yqgNG9xQWJucWY6ROoUoy7Hqwn/vzEJs eTl56VKifNGgxQJgBRllObBjYBF1SVGWSlhXkago4R4ClKLcjNLUOVfMYpzMCoJ8/qCXMKTmV cCt+kV0BFMQEdcaZ8EckRJIkJKqoHxmiSD6ulPq5UvHpsuJyic/UHg4aLEmQFcPMcUS1fqLZ6 2/nVI4vJN3wW2TO2q/X+UQyjv+E7210JurR6Tv3DcPsC13KV5gp9ZX2zJXbsDn5ad4n+6t0zt UUPkTL03sma8tqdnHqzX2/HTw32P4uuVpvrHtPZnbPXJvHbAv+5nkFBv9tM5PcyflFiKMxINt ZiLihMBY7Uw16UCAAA= X-Env-Sender: prvs=395e6b081=wei.liu2@citrix.com X-Msg-Ref: server-2.tower-27.messagelabs.com!1502981252!52703625!1 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 58851 invoked from network); 17 Aug 2017 14:47:33 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-2.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 17 Aug 2017 14:47:33 -0000 X-IronPort-AV: E=Sophos;i="5.41,388,1498521600"; d="scan'208";a="444178836" From: Wei Liu To: Xen-devel Date: Thu, 17 Aug 2017 15:44:50 +0100 Message-ID: <20170817144456.18989-26-wei.liu2@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170817144456.18989-1-wei.liu2@citrix.com> References: <20170817144456.18989-1-wei.liu2@citrix.com> MIME-Version: 1.0 Cc: George Dunlap , Andrew Cooper , Wei Liu , Jan Beulich Subject: [Xen-devel] [PATCH v4 25/31] x86/mm: move disallow_mask variable and macros X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP They will be used by both common mm code and PV mm code in the next few patches. Note that they might be moved again later if they aren't needed by common mm code any more. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c | 19 +------------------ xen/include/asm-x86/mm.h | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 5bfdfabc5e..590e7ae65b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -146,24 +146,7 @@ bool __read_mostly machine_to_phys_mapping_valid; struct rangeset *__read_mostly mmio_ro_ranges; -static uint32_t base_disallow_mask; -/* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */ -#define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL) - -#define L2_DISALLOW_MASK base_disallow_mask - -#define l3_disallow_mask(d) (!is_pv_32bit_domain(d) ? \ - base_disallow_mask : 0xFFFFF198U) - -#define L4_DISALLOW_MASK (base_disallow_mask) - -#define l1_disallow_mask(d) \ - ((d != dom_io) && \ - (rangeset_is_empty((d)->iomem_caps) && \ - rangeset_is_empty((d)->arch.ioport_caps) && \ - !has_arch_pdevs(d) && \ - is_pv_domain(d)) ? \ - L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) +uint32_t base_disallow_mask; static s8 __read_mostly opt_mmio_relax; static void __init parse_mmio_relax(const char *s) diff --git a/xen/include/asm-x86/mm.h b/xen/include/asm-x86/mm.h index 07d4c06fc3..6857651db1 100644 --- a/xen/include/asm-x86/mm.h +++ b/xen/include/asm-x86/mm.h @@ -334,6 +334,25 @@ const unsigned long *get_platform_badpages(unsigned int *array_size); int page_lock(struct page_info *page); void page_unlock(struct page_info *page); +extern uint32_t base_disallow_mask; +/* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */ +#define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL) + +#define L2_DISALLOW_MASK base_disallow_mask + +#define l3_disallow_mask(d) (!is_pv_32bit_domain(d) ? \ + base_disallow_mask : 0xFFFFF198U) + +#define L4_DISALLOW_MASK (base_disallow_mask) + +#define l1_disallow_mask(d) \ + ((d != dom_io) && \ + (rangeset_is_empty((d)->iomem_caps) && \ + rangeset_is_empty((d)->arch.ioport_caps) && \ + !has_arch_pdevs(d) && \ + is_pv_domain(d)) ? \ + L1_DISALLOW_MASK : (L1_DISALLOW_MASK & ~PAGE_CACHE_ATTRS)) + void put_page_type(struct page_info *page); int get_page_type(struct page_info *page, unsigned long type); int put_page_type_preemptible(struct page_info *page);