| Message ID | 20170817144456.18989-5-wei.liu2@citrix.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 17/08/17 15:44, Wei Liu wrote: > Currently all the users are within x86/mm.c. But that will change once > we split PV specific mm code to another file. Lift that to page.h > along side _PAGE_* in preparation for later patches. > > No functional change. Add some spaces around "|" while moving. > > Signed-off-by: Wei Liu <wei.liu2@citrix.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 5c6a7e5638..64dd520044 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -151,8 +151,6 @@ bool __read_mostly machine_to_phys_mapping_valid; struct rangeset *__read_mostly mmio_ro_ranges; -#define PAGE_CACHE_ATTRS (_PAGE_PAT|_PAGE_PCD|_PAGE_PWT) - static uint32_t base_disallow_mask; /* Global bit is allowed to be set on L1 PTEs. Intended for user mappings. */ #define L1_DISALLOW_MASK ((base_disallow_mask | _PAGE_GNTTAB) & ~_PAGE_GLOBAL) diff --git a/xen/include/asm-x86/page.h b/xen/include/asm-x86/page.h index 263ca5bc3c..d082ba8d42 100644 --- a/xen/include/asm-x86/page.h +++ b/xen/include/asm-x86/page.h @@ -304,6 +304,8 @@ void efi_update_l4_pgtable(unsigned int l4idx, l4_pgentry_t); #define _PAGE_AVAIL_HIGH (_AC(0x7ff, U) << 12) #define _PAGE_NX (cpu_has_nx ? _PAGE_NX_BIT : 0) +#define PAGE_CACHE_ATTRS (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT) + /* * Debug option: Ensure that granted mappings are not implicitly unmapped. * WARNING: This will need to be disabled to run OSes that use the spare PTE
Currently all the users are within x86/mm.c. But that will change once we split PV specific mm code to another file. Lift that to page.h along side _PAGE_* in preparation for later patches. No functional change. Add some spaces around "|" while moving. Signed-off-by: Wei Liu <wei.liu2@citrix.com> --- xen/arch/x86/mm.c | 2 -- xen/include/asm-x86/page.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-)