From patchwork Fri Oct 13 12:35:09 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Dyasli X-Patchwork-Id: 10004425 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D9F07602B3 for ; Fri, 13 Oct 2017 12:41:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CB4282905E for ; Fri, 13 Oct 2017 12:41:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BF87929061; Fri, 13 Oct 2017 12:41:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 532D32905E for ; Fri, 13 Oct 2017 12:41:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e2zEp-0006YJ-Od; Fri, 13 Oct 2017 12:38:51 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e2zEo-0006Xt-Mp for xen-devel@lists.xen.org; Fri, 13 Oct 2017 12:38:50 +0000 Received: from [85.158.139.211] by server-7.bemta-5.messagelabs.com id 59/C2-01785-AD3B0E95; Fri, 13 Oct 2017 12:38:50 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRWlGSWpSXmKPExsXitHSDve7NzQ8 iDW5eV7VY8nExiwOjx9Hdv5kCGKNYM/OS8isSWDPOn1vCVnBepqL/Y0wD43HxLkYODgkBf4nZ F1i6GDk52AT0JDbOfsUEYosIyEqs7prD3sXIxcEscIRRYuqqI+wgCWEBV4nHW7YygtgsAqoS/ b9fMYPYvAK2EluOLgYbJCEgL7Gr7SIriM0pYCexeO8ksBohoJq/eyewQtiqEq9f7GKB6BWUOD nzCZjNLCAhcfDFC+YJjLyzkKRmIUktYGRaxahRnFpUllqka2Shl1SUmZ5RkpuYmaNraGCql5t aXJyYnpqTmFSsl5yfu4kRGDr1DAyMOxj7VvkdYpTkYFIS5VWLfBApxJeUn1KZkVicEV9UmpNa fIhRhoNDSYK3fhNQTrAoNT21Ii0zBxjEMGkJDh4lEV5zkDRvcUFibnFmOkTqFKMuR8fNu3+Yh Fjy8vNSpcR5F4IUCYAUZZTmwY2ARdQlRlkpYV5GBgYGIZ6C1KLczBJU+VeM4hyMSsK8R0Gm8G TmlcBtegV0BBPQEe8iwI4oSURISTUwzuX3OH22aM4KycJEn+POu1iMrRZsdvG7Zz+jOcb92zy tdymZ7MIS0+V3hDM/uOPO/JWb3/nrpovdk7961rRtX5B+fXnIpIDt7fe6nBca6atazvrAvND3 0u441a9B2ipM1bW1V5jm9lr3JvbFfHy4LGNRuNacs9lLfUrvmX5e9uHzZWUOl1dhSizFGYmGW sxFxYkAWCejHqMCAAA= X-Env-Sender: prvs=452ef7b8b=sergey.dyasli@citrix.com X-Msg-Ref: server-8.tower-206.messagelabs.com!1507898327!106708809!2 X-Originating-IP: [66.165.176.63] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni42MyA9PiAzMDYwNDg=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 19806 invoked from network); 13 Oct 2017 12:38:49 -0000 Received: from smtp02.citrix.com (HELO SMTP02.CITRIX.COM) (66.165.176.63) by server-8.tower-206.messagelabs.com with RC4-SHA encrypted SMTP; 13 Oct 2017 12:38:49 -0000 X-IronPort-AV: E=Sophos;i="5.43,371,1503360000"; d="scan'208";a="453858533" From: Sergey Dyasli To: Date: Fri, 13 Oct 2017 13:35:09 +0100 Message-ID: <20171013123512.26102-4-sergey.dyasli@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171013123512.26102-1-sergey.dyasli@citrix.com> References: <20171013123512.26102-1-sergey.dyasli@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Kevin Tian , Jan Beulich , Jun Nakajima , Sergey Dyasli Subject: [Xen-devel] [PATCH v3 3/6] x86/msr: read VMX MSRs values into Raw policy X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add calculate_raw_vmx_policy() which fills Raw policy with H/W values of VMX MSRs. Host policy will contain a copy of these values. Signed-off-by: Sergey Dyasli --- xen/arch/x86/msr.c | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 24029a2ac1..955aba0849 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -32,6 +32,81 @@ struct msr_domain_policy __read_mostly raw_msr_domain_policy, struct msr_vcpu_policy __read_mostly hvm_max_msr_vcpu_policy, __read_mostly pv_max_msr_vcpu_policy; +static void __init calculate_raw_vmx_policy(struct msr_domain_policy *dp) +{ + if ( !cpu_has_vmx ) + return; + + dp->vmx_basic.available = true; + rdmsrl(MSR_IA32_VMX_BASIC, dp->vmx_basic.u.raw); + + dp->vmx_pinbased_ctls.available = true; + rdmsrl(MSR_IA32_VMX_PINBASED_CTLS, dp->vmx_pinbased_ctls.u.raw); + + dp->vmx_procbased_ctls.available = true; + rdmsrl(MSR_IA32_VMX_PROCBASED_CTLS, dp->vmx_procbased_ctls.u.raw); + + dp->vmx_exit_ctls.available = true; + rdmsrl(MSR_IA32_VMX_EXIT_CTLS, dp->vmx_exit_ctls.u.raw); + + dp->vmx_entry_ctls.available = true; + rdmsrl(MSR_IA32_VMX_ENTRY_CTLS, dp->vmx_entry_ctls.u.raw); + + dp->vmx_misc.available = true; + rdmsrl(MSR_IA32_VMX_MISC, dp->vmx_misc.u.raw); + + dp->vmx_cr0_fixed0.available = true; + rdmsrl(MSR_IA32_VMX_CR0_FIXED0, dp->vmx_cr0_fixed0.u.raw); + + dp->vmx_cr0_fixed1.available = true; + rdmsrl(MSR_IA32_VMX_CR0_FIXED1, dp->vmx_cr0_fixed1.u.raw); + + dp->vmx_cr4_fixed0.available = true; + rdmsrl(MSR_IA32_VMX_CR4_FIXED0, dp->vmx_cr4_fixed0.u.raw); + + dp->vmx_cr4_fixed1.available = true; + rdmsrl(MSR_IA32_VMX_CR4_FIXED1, dp->vmx_cr4_fixed1.u.raw); + + dp->vmx_vmcs_enum.available = true; + rdmsrl(MSR_IA32_VMX_VMCS_ENUM, dp->vmx_vmcs_enum.u.raw); + + if ( dp->vmx_procbased_ctls.u.allowed_1.activate_secondary_controls ) + { + dp->vmx_procbased_ctls2.available = true; + rdmsrl(MSR_IA32_VMX_PROCBASED_CTLS2, dp->vmx_procbased_ctls2.u.raw); + + if ( dp->vmx_procbased_ctls2.u.allowed_1.enable_ept || + dp->vmx_procbased_ctls2.u.allowed_1.enable_vpid ) + { + dp->vmx_ept_vpid_cap.available = true; + rdmsrl(MSR_IA32_VMX_EPT_VPID_CAP, dp->vmx_ept_vpid_cap.u.raw); + } + } + + if ( dp->vmx_basic.u.default1_zero ) + { + dp->vmx_true_pinbased_ctls.available = true; + rdmsrl(MSR_IA32_VMX_TRUE_PINBASED_CTLS, + dp->vmx_true_pinbased_ctls.u.raw); + + dp->vmx_true_procbased_ctls.available = true; + rdmsrl(MSR_IA32_VMX_TRUE_PROCBASED_CTLS, + dp->vmx_true_procbased_ctls.u.raw); + + dp->vmx_true_exit_ctls.available = true; + rdmsrl(MSR_IA32_VMX_TRUE_EXIT_CTLS, dp->vmx_true_exit_ctls.u.raw); + + dp->vmx_true_entry_ctls.available = true; + rdmsrl(MSR_IA32_VMX_TRUE_ENTRY_CTLS, dp->vmx_true_entry_ctls.u.raw); + } + + if ( dp->vmx_procbased_ctls2.u.allowed_1.enable_vm_functions ) + { + dp->vmx_vmfunc.available = true; + rdmsrl(MSR_IA32_VMX_VMFUNC, dp->vmx_vmfunc.u.raw); + } +} + static void __init calculate_raw_policy(void) { struct msr_domain_policy *dp = &raw_msr_domain_policy; @@ -43,6 +118,8 @@ static void __init calculate_raw_policy(void) if ( val & MSR_PLATFORM_INFO_CPUID_FAULTING ) dp->plaform_info.cpuid_faulting = true; } + + calculate_raw_vmx_policy(dp); } static void __init calculate_host_policy(void)