From patchwork Fri Oct 13 12:35:10 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergey Dyasli X-Patchwork-Id: 10004431 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id CCB3A602B3 for ; Fri, 13 Oct 2017 12:41:09 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BE85F28883 for ; Fri, 13 Oct 2017 12:41:09 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id B365B2905E; Fri, 13 Oct 2017 12:41:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3295228883 for ; Fri, 13 Oct 2017 12:41:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e2zF1-0006bQ-A7; Fri, 13 Oct 2017 12:39:03 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1e2zF0-0006aY-NZ for xen-devel@lists.xen.org; Fri, 13 Oct 2017 12:39:02 +0000 Received: from [193.109.254.147] by server-11.bemta-6.messagelabs.com id FD/79-20813-6E3B0E95; Fri, 13 Oct 2017 12:39:02 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRWlGSWpSXmKPExsXitHRDpO7TzQ8 iDZ7u4bZY8nExiwOjx9Hdv5kCGKNYM/OS8isSWDPOzdjDWvDCuuL/iV1MDYybDLsYOTkkBPwl fu/bzARiswnoSWyc/QrMFhGQlVjdNYe9i5GLg1ngCKPE1FVH2EESwgIeEn0/NzKD2CwCqhJt3 86CNfAK2Er0nHzHCDFUXmJX20VWEJtTwE5i8d5JYPVCQDV/905ghbBVJV6/2MUC0SsocXLmEz CbWUBC4uCLF8wTGHlnIUnNQpJawMi0ilGjOLWoLLVI18hIL6koMz2jJDcxM0fX0MBMLze1uDg xPTUnMalYLzk/dxMjMHwYgGAH45r5gYcYJTmYlER51SIfRArxJeWnVGYkFmfEF5XmpBYfYpTh 4FCS4GUAhqOQYFFqempFWmYOMJBh0hIcPEoivOabgNK8xQWJucWZ6RCpU4y6HB037/5hEmLJy 89LlRLnXQhSJABSlFGaBzcCFlWXGGWlhHkZgY4S4ilILcrNLEGVf8UozsGoJMzLDHIJT2ZeCd ymV0BHMAEd8S4C7IiSRISUVANj8vStYje837IlMv/fd/PGosVxPRGCfMsl5tj0T+JVlX1T++/ RM3YTze1vX316cVIkc6KoUMzzoolffJbvtJ9k/H5bg2bgt1K9bRdVo1Y4PPuy96qFaqOSv99J Z68nmXpc3HaCPHmTog8scf+dtcFk6XzXA7k+PJFHly5ZLGrq6L7K5MDJTSdPK7EUZyQaajEXF ScCAHljPf+lAgAA X-Env-Sender: prvs=452ef7b8b=sergey.dyasli@citrix.com X-Msg-Ref: server-2.tower-27.messagelabs.com!1507898339!51978909!1 X-Originating-IP: [66.165.176.89] X-SpamReason: No, hits=0.0 required=7.0 tests=sa_preprocessor: VHJ1c3RlZCBJUDogNjYuMTY1LjE3Ni44OSA9PiAyMDMwMDc=\n, received_headers: No Received headers X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 5751 invoked from network); 13 Oct 2017 12:39:00 -0000 Received: from smtp.citrix.com (HELO SMTP.CITRIX.COM) (66.165.176.89) by server-2.tower-27.messagelabs.com with RC4-SHA encrypted SMTP; 13 Oct 2017 12:39:00 -0000 X-IronPort-AV: E=Sophos;i="5.43,371,1503360000"; d="scan'208";a="445898691" From: Sergey Dyasli To: Date: Fri, 13 Oct 2017 13:35:10 +0100 Message-ID: <20171013123512.26102-5-sergey.dyasli@citrix.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171013123512.26102-1-sergey.dyasli@citrix.com> References: <20171013123512.26102-1-sergey.dyasli@citrix.com> MIME-Version: 1.0 Cc: Andrew Cooper , Kevin Tian , Jan Beulich , Jun Nakajima , Sergey Dyasli Subject: [Xen-devel] [PATCH v3 4/6] x86/msr: add VMX MSRs into HVM_max domain policy X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Currently, when nested virt is enabled, the set of L1 VMX features is fixed and calculated by nvmx_msr_read_intercept() as an intersection between the full set of Xen's supported L1 VMX features, the set of actual H/W features and, for MSR_IA32_VMX_EPT_VPID_CAP, the set of features that Xen uses. Add calculate_hvm_max_vmx_policy() which will save the end result of nvmx_msr_read_intercept() on current H/W into HVM_max domain policy. There will be no functional change to what L1 sees in VMX MSRs. But the actual use of HVM_max domain policy will happen later, when VMX MSRs are handled by guest_rd/wrmsr(). Signed-off-by: Sergey Dyasli --- xen/arch/x86/msr.c | 140 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 140 insertions(+) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 955aba0849..388f19e50d 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -129,6 +129,144 @@ static void __init calculate_host_policy(void) *dp = raw_msr_domain_policy; } +#define vmx_host_allowed_cpy(dp, msr, field) \ + do { \ + dp->msr.u.allowed_1.field = \ + host_msr_domain_policy.msr.u.allowed_1.field; \ + dp->msr.u.allowed_0.field = \ + host_msr_domain_policy.msr.u.allowed_0.field; \ + } while (0) + +static void __init calculate_hvm_max_vmx_policy(struct msr_domain_policy *dp) +{ + if ( !cpu_has_vmx ) + return; + + dp->vmx_basic.available = true; + dp->vmx_basic.u.raw = host_msr_domain_policy.vmx_basic.u.raw; + + dp->vmx_pinbased_ctls.available = true; + dp->vmx_pinbased_ctls.u.raw = + ((uint64_t) VMX_PINBASED_CTLS_DEFAULT1 << 32) | + VMX_PINBASED_CTLS_DEFAULT1; + vmx_host_allowed_cpy(dp, vmx_pinbased_ctls, ext_intr_exiting); + vmx_host_allowed_cpy(dp, vmx_pinbased_ctls, nmi_exiting); + vmx_host_allowed_cpy(dp, vmx_pinbased_ctls, preempt_timer); + + dp->vmx_procbased_ctls.available = true; + dp->vmx_procbased_ctls.u.raw = + ((uint64_t) VMX_PROCBASED_CTLS_DEFAULT1 << 32) | + VMX_PROCBASED_CTLS_DEFAULT1; + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, virtual_intr_pending); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, use_tsc_offseting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, hlt_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, invlpg_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, mwait_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, rdpmc_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, rdtsc_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, cr8_load_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, cr8_store_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, tpr_shadow); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, virtual_nmi_pending); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, mov_dr_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, uncond_io_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, activate_io_bitmap); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, monitor_trap_flag); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, activate_msr_bitmap); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, monitor_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, pause_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls, activate_secondary_controls); + + dp->vmx_exit_ctls.available = true; + dp->vmx_exit_ctls.u.raw = + ((uint64_t) VMX_EXIT_CTLS_DEFAULT1 << 32) | + VMX_EXIT_CTLS_DEFAULT1; + vmx_host_allowed_cpy(dp, vmx_exit_ctls, ia32e_mode); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, load_perf_global_ctrl); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, ack_intr_on_exit); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, save_guest_pat); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, load_host_pat); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, save_guest_efer); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, load_host_efer); + vmx_host_allowed_cpy(dp, vmx_exit_ctls, save_preempt_timer); + + dp->vmx_entry_ctls.available = true; + dp->vmx_entry_ctls.u.raw = + ((uint64_t) VMX_ENTRY_CTLS_DEFAULT1 << 32) | + VMX_ENTRY_CTLS_DEFAULT1; + vmx_host_allowed_cpy(dp, vmx_entry_ctls, ia32e_mode); + vmx_host_allowed_cpy(dp, vmx_entry_ctls, load_perf_global_ctrl); + vmx_host_allowed_cpy(dp, vmx_entry_ctls, load_guest_pat); + vmx_host_allowed_cpy(dp, vmx_entry_ctls, load_guest_efer); + + dp->vmx_misc.available = true; + dp->vmx_misc.u.raw = host_msr_domain_policy.vmx_misc.u.raw; + /* Do not support CR3-target feature now */ + dp->vmx_misc.u.cr3_target = false; + + dp->vmx_cr0_fixed0.available = true; + /* PG, PE bits must be 1 in VMX operation */ + dp->vmx_cr0_fixed0.u.allowed_0.pe = true; + dp->vmx_cr0_fixed0.u.allowed_0.pg = true; + + dp->vmx_cr0_fixed1.available = true; + /* allow 0-settings for all bits */ + dp->vmx_cr0_fixed1.u.raw = 0xffffffff; + + dp->vmx_cr4_fixed0.available = true; + /* VMXE bit must be 1 in VMX operation */ + dp->vmx_cr4_fixed0.u.allowed_0.vmxe = true; + + dp->vmx_cr4_fixed1.available = true; + /* + * Allowed CR4 bits will be updated during domain creation by + * hvm_cr4_guest_valid_bits() + */ + dp->vmx_cr4_fixed1.u.raw = host_msr_domain_policy.vmx_cr4_fixed1.u.raw; + + dp->vmx_vmcs_enum.available = true; + /* The max index of VVMCS encoding is 0x1f. */ + dp->vmx_vmcs_enum.u.vmcs_encoding_max_idx = 0x1f; + + if ( dp->vmx_procbased_ctls.u.allowed_1.activate_secondary_controls ) + { + dp->vmx_procbased_ctls2.available = true; + vmx_host_allowed_cpy(dp, vmx_procbased_ctls2, virtualize_apic_accesses); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls2, enable_ept); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls2, descriptor_table_exiting); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls2, enable_vpid); + vmx_host_allowed_cpy(dp, vmx_procbased_ctls2, unrestricted_guest); + + if ( dp->vmx_procbased_ctls2.u.allowed_1.enable_ept || + dp->vmx_procbased_ctls2.u.allowed_1.enable_vpid ) + { + dp->vmx_ept_vpid_cap.available = true; + dp->vmx_ept_vpid_cap.u.raw = nept_get_ept_vpid_cap(); + } + } + + if ( dp->vmx_basic.u.default1_zero ) + { + dp->vmx_true_pinbased_ctls.available = true; + dp->vmx_true_pinbased_ctls.u.raw = dp->vmx_pinbased_ctls.u.raw; + + dp->vmx_true_procbased_ctls.available = true; + dp->vmx_true_procbased_ctls.u.raw = dp->vmx_procbased_ctls.u.raw; + vmx_host_allowed_cpy(dp, vmx_true_procbased_ctls, cr3_load_exiting); + vmx_host_allowed_cpy(dp, vmx_true_procbased_ctls, cr3_store_exiting); + + dp->vmx_true_exit_ctls.available = true; + dp->vmx_true_exit_ctls.u.raw = dp->vmx_exit_ctls.u.raw; + + dp->vmx_true_entry_ctls.available = true; + dp->vmx_true_entry_ctls.u.raw = dp->vmx_entry_ctls.u.raw; + } + + dp->vmx_vmfunc.available = false; +} + +#undef vmx_host_allowed_cpy + static void __init calculate_hvm_max_policy(void) { struct msr_domain_policy *dp = &hvm_max_msr_domain_policy; @@ -146,6 +284,8 @@ static void __init calculate_hvm_max_policy(void) /* 0x00000140 MSR_INTEL_MISC_FEATURES_ENABLES */ vp->misc_features_enables.available = dp->plaform_info.available; + + calculate_hvm_max_vmx_policy(dp); } static void __init calculate_pv_max_policy(void)