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MWHPR12MB1840; 20:qXOqlGV/T8WGCUbE3KjcjhgyevxQbla6xLtfbStkkszpo9sVA9BTE2MOpkZnUp7b+H7Gk4wpBOQfYKZVVDJjlASNqi16oURY814/pgRhCw6p5E90gkhvmCM8zIQeWNZ/yhplJziLU120SNpoob8LDQTDKIai1Y0P12hafR2vgzePlLULBYx+aqz4kCa/gBvTfNbFUdcmiTeOiv2+43H+3g+Se8i+rzzuR+OK+JR2AtD3q1A1+kv4neEW78zAP4sP X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Oct 2017 22:03:25.7732 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ab7c73dc-ea66-4d5e-5a3d-08d520ab3623 X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR12MB1840 Cc: andrew.cooper3@citrix.com, boris.ostrovsky@oracle.com, Brian Woods , jbeulich@suse.com, suravee.suthikulpanit@amd.com Subject: [Xen-devel] [PATCH 1/3] x86/svm: rename lbr control field in vmcb X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Brian Woods Rename the lbr_control field in the vmcb for future/upcoming changes. Signed-off-by: Brian Woods --- xen/arch/x86/hvm/svm/nestedsvm.c | 10 +++++----- xen/arch/x86/hvm/svm/svm.c | 2 +- xen/include/asm-x86/hvm/svm/nestedsvm.h | 4 ++-- xen/include/asm-x86/hvm/svm/vmcb.h | 6 +++--- 4 files changed, 11 insertions(+), 11 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 1de896e456..5513f7a388 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -174,7 +174,7 @@ int nsvm_vcpu_reset(struct vcpu *v) svm->ns_exception_intercepts = 0; svm->ns_general1_intercepts = 0; svm->ns_general2_intercepts = 0; - svm->ns_lbr_control.bytes = 0; + svm->ns_virt_ext.bytes = 0; svm->ns_hap_enabled = 0; svm->ns_vmcb_guestcr3 = 0; @@ -521,12 +521,12 @@ static int nsvm_vmcb_prepare4vmrun(struct vcpu *v, struct cpu_user_regs *regs) /* Pending Interrupts */ n2vmcb->eventinj = ns_vmcb->eventinj; - /* LBR virtualization */ + /* LBR and other virtualization */ if (!vcleanbit_set(lbr)) { - svm->ns_lbr_control = ns_vmcb->lbr_control; + svm->ns_virt_ext = ns_vmcb->virt_ext; } - n2vmcb->lbr_control.bytes = - n1vmcb->lbr_control.bytes | ns_vmcb->lbr_control.bytes; + n2vmcb->virt_ext.bytes = + n1vmcb->virt_ext.bytes | ns_vmcb->virt_ext.bytes; /* NextRIP - only evaluated on #VMEXIT. */ diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index b9cf423fd9..c8ffb17515 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1997,7 +1997,7 @@ static int svm_msr_write_intercept(unsigned int msr, uint64_t msr_content) vmcb_set_debugctlmsr(vmcb, msr_content); if ( !msr_content || !cpu_has_svm_lbrv ) break; - vmcb->lbr_control.fields.enable = 1; + vmcb->virt_ext.fields.lbr_enable = 1; svm_disable_intercept_for_msr(v, MSR_IA32_DEBUGCTLMSR); svm_disable_intercept_for_msr(v, MSR_IA32_LASTBRANCHFROMIP); svm_disable_intercept_for_msr(v, MSR_IA32_LASTBRANCHTOIP); diff --git a/xen/include/asm-x86/hvm/svm/nestedsvm.h b/xen/include/asm-x86/hvm/svm/nestedsvm.h index 4b36c25c5d..a619b6131b 100644 --- a/xen/include/asm-x86/hvm/svm/nestedsvm.h +++ b/xen/include/asm-x86/hvm/svm/nestedsvm.h @@ -46,8 +46,8 @@ struct nestedsvm { uint32_t ns_general1_intercepts; uint32_t ns_general2_intercepts; - /* Cached real lbr of the l2 guest */ - lbrctrl_t ns_lbr_control; + /* Cached real lbr and other virtual extentions of the l2 guest */ + virt_ext_t ns_virt_ext; /* Cached real MSR permission bitmaps of the l2 guest */ unsigned long *ns_cached_msrpm; diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h index 01ce20b0bd..beec1f6c0e 100644 --- a/xen/include/asm-x86/hvm/svm/vmcb.h +++ b/xen/include/asm-x86/hvm/svm/vmcb.h @@ -358,9 +358,9 @@ typedef union u64 bytes; struct { - u64 enable:1; + u64 lbr_enable:1; } fields; -} lbrctrl_t; +} virt_ext_t; typedef union { @@ -427,7 +427,7 @@ struct vmcb_struct { u64 res08[2]; eventinj_t eventinj; /* offset 0xA8 */ u64 _h_cr3; /* offset 0xB0 - cleanbit 4 */ - lbrctrl_t lbr_control; /* offset 0xB8 */ + virt_ext_t virt_ext; /* offset 0xB8 */ vmcbcleanbits_t cleanbits; /* offset 0xC0 */ u32 res09; /* offset 0xC4 */ u64 nextrip; /* offset 0xC8 */