From patchwork Wed Apr 17 17:58:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10905737 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CE5D7922 for ; Wed, 17 Apr 2019 18:00:16 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B9E1C28590 for ; Wed, 17 Apr 2019 18:00:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AD83F28B26; Wed, 17 Apr 2019 18:00:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3B3F528590 for ; Wed, 17 Apr 2019 18:00:11 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hGopI-0004AF-0U; Wed, 17 Apr 2019 17:58:28 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hGopG-00049p-IC for xen-devel@lists.xenproject.org; Wed, 17 Apr 2019 17:58:26 +0000 X-Inumbo-ID: 65c22002-613a-11e9-92d7-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id 65c22002-613a-11e9-92d7-bc764e045a96; Wed, 17 Apr 2019 17:58:25 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 432B515AB; Wed, 17 Apr 2019 10:58:25 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 32FBD3F59C; Wed, 17 Apr 2019 10:58:24 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Wed, 17 Apr 2019 18:58:11 +0100 Message-Id: <20190417175815.16905-4-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190417175815.16905-1-julien.grall@arm.com> References: <20190417175815.16905-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 3/7] xen/arm: tlbflush: Clarify the TLB helpers name X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , sstabellini@kernel.org, Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP TLB helpers in the headers tlbflush.h are currently quite confusing to use the name may lead to think they are dealing with hypervisors TLBs while they actually deal with guest TLBs. Rename them to make it clearer that we are dealing with guest TLBs. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/p2m.c | 6 +++--- xen/arch/arm/smp.c | 2 +- xen/arch/arm/traps.c | 2 +- xen/include/asm-arm/arm32/flushtlb.h | 8 ++++---- xen/include/asm-arm/arm64/flushtlb.h | 8 ++++---- 5 files changed, 13 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index c38bd7e16e..92c2413f20 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -151,7 +151,7 @@ void p2m_restore_state(struct vcpu *n) * when running multiple vCPU of the same domain on a single pCPU. */ if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id ) - flush_tlb_local(); + flush_guest_tlb_local(); *last_vcpu_ran = n->vcpu_id; } @@ -196,7 +196,7 @@ static void p2m_force_tlb_flush_sync(struct p2m_domain *p2m) isb(); } - flush_tlb(); + flush_guest_tlb(); if ( ovttbr != READ_SYSREG64(VTTBR_EL2) ) { @@ -1969,7 +1969,7 @@ static void setup_virt_paging_one(void *data) WRITE_SYSREG(READ_SYSREG(HCR_EL2) | HCR_VM, HCR_EL2); isb(); - flush_tlb_all_local(); + flush_all_guests_tlb_local(); } } diff --git a/xen/arch/arm/smp.c b/xen/arch/arm/smp.c index 62f57f0ba2..ce1fcc8ef9 100644 --- a/xen/arch/arm/smp.c +++ b/xen/arch/arm/smp.c @@ -8,7 +8,7 @@ void flush_tlb_mask(const cpumask_t *mask) { /* No need to IPI other processors on ARM, the processor takes care of it. */ - flush_tlb_all(); + flush_all_guests_tlb(); } void smp_send_event_check_mask(const cpumask_t *mask) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index d8b9a8a0f0..1aba970415 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1924,7 +1924,7 @@ static void do_trap_stage2_abort_guest(struct cpu_user_regs *regs, * still be inaccurate. */ if ( !is_data ) - flush_tlb_local(); + flush_guest_tlb_local(); rc = gva_to_ipa(gva, &gpa, GV2M_READ); /* diff --git a/xen/include/asm-arm/arm32/flushtlb.h b/xen/include/asm-arm/arm32/flushtlb.h index bbcc82f490..22e100eccf 100644 --- a/xen/include/asm-arm/arm32/flushtlb.h +++ b/xen/include/asm-arm/arm32/flushtlb.h @@ -2,7 +2,7 @@ #define __ASM_ARM_ARM32_FLUSHTLB_H__ /* Flush local TLBs, current VMID only */ -static inline void flush_tlb_local(void) +static inline void flush_guest_tlb_local(void) { dsb(sy); @@ -13,7 +13,7 @@ static inline void flush_tlb_local(void) } /* Flush inner shareable TLBs, current VMID only */ -static inline void flush_tlb(void) +static inline void flush_guest_tlb(void) { dsb(sy); @@ -24,7 +24,7 @@ static inline void flush_tlb(void) } /* Flush local TLBs, all VMIDs, non-hypervisor mode */ -static inline void flush_tlb_all_local(void) +static inline void flush_all_guests_tlb_local(void) { dsb(sy); @@ -35,7 +35,7 @@ static inline void flush_tlb_all_local(void) } /* Flush innershareable TLBs, all VMIDs, non-hypervisor mode */ -static inline void flush_tlb_all(void) +static inline void flush_all_guests_tlb(void) { dsb(sy); diff --git a/xen/include/asm-arm/arm64/flushtlb.h b/xen/include/asm-arm/arm64/flushtlb.h index 942f2d3992..adbbd5c522 100644 --- a/xen/include/asm-arm/arm64/flushtlb.h +++ b/xen/include/asm-arm/arm64/flushtlb.h @@ -2,7 +2,7 @@ #define __ASM_ARM_ARM64_FLUSHTLB_H__ /* Flush local TLBs, current VMID only */ -static inline void flush_tlb_local(void) +static inline void flush_guest_tlb_local(void) { asm volatile( "dsb sy;" @@ -13,7 +13,7 @@ static inline void flush_tlb_local(void) } /* Flush innershareable TLBs, current VMID only */ -static inline void flush_tlb(void) +static inline void flush_guest_tlb(void) { asm volatile( "dsb sy;" @@ -24,7 +24,7 @@ static inline void flush_tlb(void) } /* Flush local TLBs, all VMIDs, non-hypervisor mode */ -static inline void flush_tlb_all_local(void) +static inline void flush_all_guests_tlb_local(void) { asm volatile( "dsb sy;" @@ -35,7 +35,7 @@ static inline void flush_tlb_all_local(void) } /* Flush innershareable TLBs, all VMIDs, non-hypervisor mode */ -static inline void flush_tlb_all(void) +static inline void flush_all_guests_tlb(void) { asm volatile( "dsb sy;"